• Journal of Power Electronics
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• 제8권3호
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• pp.259-267
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• 2008

Power quality improvement in a three-phase four-wire system is achieved using a new topology of DSTATCOM (distribution static compensator) consisting of a star/delta transformer with a tertiary winding and a three-leg VSC (voltage source converter). This new topology of DSTATCOM is proposed for power factor correction or voltage regulation along with harmonic elimination, load balancing and neutral current compensation. A tertiary winding is introduced in each phase for a delta connected secondary in addition to the star-star windings and this delta connected winding is responsible for neutral current compensation. The dynamic performance of the proposed DSTATCOM system is demonstrated using MATLAB with its Simulink and Power System Blockset (PSB) toolboxes under varying loads. The capacitor supported DC bus of the DSTATCOM is regulated to the reference voltage under varying loads.

• 한국정보통신학회논문지
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• 제18권9호
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• pp.2243-2250
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• 2014

무선센서 네트워크에서, 위치기반의 라우팅 알고리즘은 네트워크의 성능을 향상 시킬 수 있다. 따라서 많은 위치 추적 알고리즘이 제안되고 있다. 하지만, 실제 상황의 무선센서 네트워크에서 각각의 노드가 자신의 위치를 인지할 시 오차가 수반된다. 특히 실내 환경은 콘크리트 벽이나 가구와 같은 NLOS환경을 만드는 장해물을 가지고 있기 때문에 위치 추적 시 심각한 오차가 발생한다. 이러한 문제를 해결하기 위해서, 앵커노드로부터 얻어지는 위치정보로 구축한 토폴로지와 모바일 노드간의 연결을 가중치로 하는 MST 토폴로지 정보의 차이점을 이용해서 위치 오차를 보정하는 알고리즘을 제안한다. 제안한 알고리즘은 NLOS환경이 존재하는 네트워크에서, 위치 오차를 보정하여 위치기반 네트워크의 성능을 개선할 수 있다.

• Journal of Power Electronics
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• 제16권5호
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• pp.1928-1938
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• 2016

The three-phase four-wire shunt active power filter (APF) is an effective method to solve the harmonic problem in three-phase four-wire power systems. In addition, it has two possible topologies, a four-leg inverter and a three-leg inverter with a split-capacitor. There are some studies investigating DC-link voltage control in three-phase four-wire APFs. However, when compared to the four-leg inverter topology, maintaining the balance between the DC-link upper and lower capacitor voltages becomes a unique problem in the three-leg inverter with a split-capacitor topology, and previous studies seldom pay attention to this fact. In this paper, the influence of the balance between the two DC-link voltages on the compensation performance, and the influence of the voltage balance controller on the compensation performance, are analyzed. To achieve the balance between the two DC-link capacitor voltages, and to avoid the adverse effect the voltage balance controller has on the APF compensation performance, a new DC-link voltage balance control strategy for the three-phase four-wire split-capacitor APF is proposed. Representative simulation and experimental results are presented to verify the analysis and the proposed DC-link voltage balance control strategy.

• Journal of Power Electronics
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• 제19권5호
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• pp.1315-1325
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• 2019

Aiming at the negative sequence and harmonic problems in the operation of railway static power conditioners, an optimization compensation strategy for negative sequence and harmonics is studied in this paper. First, the hybrid RPC topology and compensation principle are analyzed to obtain different compensation zone states and current capacities. Second, in order to optimize the RPC capacity configuration, the minimum RPC compensation capacity is calculated according to constraint conditions, and the optimal compensation coefficient and compensation angle are obtained. In addition, the voltage unbalance ${\varepsilon}_U$ and power factor requirements are satisfied. A PSO (Particle Swarm Optimization) algorithm is used to calculate the three indexes for minimum compensating energy. The proposed method can precisely calculate the optimal compensation capacity in real time. Finally, MATLAB simulations and an experimental platform verify the effectiveness and economics of the proposed algorithm.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.317-320
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• 2000

This paper proposes a voltage compensation method to improve the control performance of B4 inverter which is studied for low-cost drive systems. The B4 inverter employs only four switches and it has a center-tapped connection in the split dc-link capacitors to one phase of a three-phase motor. In the B4 topology unbalan-cd three-phase voltages will be generated by the dc link voltage ripple. To solve this problem we present a voltage compensation method which adjusts switching times considering dc link voltage ripple. The proposed method is verified by simulation results,

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.321-322
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• 2015

The aim of this paper is to propose a design method for the double-sided LCC compensation circuit for 6.6kW electric vehicle (EVs) wireless charger. The analysis and comparison with several compensation topologies such as SS, SP, PS, PP and the hybrid LCC compensation is presented. It has been found that the hybrid LCC compensation has superior performance in comparison with other topologies. The design procedure for the EV charger is presented and the PSIM simulation results are provided.

• ETRI Journal
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• 제32권4호
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• pp.520-529
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• 2010

In this paper, we present a low-voltage low-dropout voltage regulator (LDO) for a system-on-chip (SoC) application which, exploiting the multiplication of the Miller effect through the use of a current amplifier, is frequency compensated up to 1-nF capacitive load. The topology and the strategy adopted to design the LDO and the related compensation frequency network are described in detail. The LDO works with a supply voltage as low as 1.2 V and provides a maximum load current of 50 mA with a drop-out voltage of 200 mV: the total integrated compensation capacitance is about 40 pF. Measurement results as well as comparison with other SoC LDOs demonstrate the advantage of the proposed topology.

• Journal of Power Electronics
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• 제17권3호
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• pp.777-787
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• 2017

A new single phase half-bridge cascaded multilevel inverter based series active power filter (SAPF) is proposed. The main parts of the inverter are presented in detail. With the proposed inverter topology, any compensation voltage reference can be easily obtained. Therefore, the inverter acts as a harmonic source when the reference is a non-sinusoidal signal. A 31-level inverter based SAPF with the proposed topology, is manufactured and the voltage harmonics of the load connected to the point of common coupling (PCC) are compensated. There is no need for a parallel passive filter (PPF) since the main purpose of the paper is to represent the compensation capability of the SAPF without a PPF. It is aimed to compensate the voltage harmonics of the load fed by a non-sinusoidal supply using the proposed inverter. The validity of the proposed inverter based SAPF is verified by simulation as well as experimental study. The system efficiency is also measured in this study. Both simulation and experimental results show that the proposed multilevel inverter is suitable for SAPF applications.

• 한국ITS학회:학술대회논문집
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• 한국ITS학회 2008년도 제7회 추계학술대회 및 정기총회
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• pp.158-160
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• 2008

• Journal of Power Electronics
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• 제13권1호
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• pp.51-58
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• 2013

This paper proposes the power conversion mechanism of a bailer-charge-transfer zero-current-switching (CT-ZCS) circuit. The operation modes are analyzed and researched using state trajectory equations. The topology of CT-ZCS based on soft-switching inverters offers some merits such as: tracking the input reference signal dynamically, bearing load shock and short circuit, multiplying inverter N+1 redundancy parallel, coordinating power balance for easy control, and soft-switching commutation for high efficiency and large capacity. These advantages are distinctive from conventional inverter topologies and are especially demanded in AC drives: new energy generation and grid, distributed generation systems, switching power amplifier, active power filter, and reactive power compensation and so on. Prototype is manufactured and experiment results show the feasibility and dynamic voltage-tracking characteristics of the topology.