• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.149-152
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• 1998

A synchronization is very important element not only wire communication but also wireless communication. A synchronous oscillator(SO) is a network which synchronizes, tracks, filter, amplifies and divides (if necessary) in a single process. The coherent phase synchronous oscillator(CPSO) is created by adding two external loops to the SO. The CPSO ratains all virtues of a SO while providing coherency throughout the tracking range. This paper has applied a clock recovery of GPS signal using CPSO.

• The Journal of Korea Robotics Society
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• v.18 no.3
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• pp.281-284
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• 2023

Real-time control communication network system is important for developing defense robots because it affects environmental interaction, performance, and safety. We propose a real-time control communication network using the Xenomai real-time operating system and the open-source EtherCAT master library, SOEM. EtherCAT is an Ethernet-based industrial communication method. It has low latency and many functions such as cable redundancy and distributed clock synchronization. We use Xenomai RTOS and Intel NUC to develop the system. Experimental tests demonstrate the Real-time EtherCAT master implementation, and communication with CiA301-based slave devices. The jitter measurement was conducted to validate the real-time performance of the system. The proposed system shows possibility for real-time robotics applications in various defense robots.

• Journal of Broadcast Engineering
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• v.9 no.1
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• pp.83-90
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• 2004

DVB-MHP recommends that NPT(normal play time) be used as the times of stream events. NPT is the local time within an event(TV program). But we found that commercial transport stream (TS) generators and middlewares for DVB-MHP settop boxes are not ready to support the use of NPT by applications. In particular, TS generators do not create NPT reference descriptors needed to reconstruct NPT at the TV receiver. This situation is undesirable because program providers cannot experiment with the idea of synchronized applications. So we have implemented a TS generator that inserts NPT reference descriptors to TS and MyGetNPT API to approximately reconstruct NPT. STC (system time clock) is needed to reconstruct NPT, but Xlets are not allowed to read it. So, we approximate STC by using PCR (program clock reference) and the Java system tune. In this method, the stream generator extrats PCRs from an existing TS and inserts them into null TS packets in the form of MPEG sections, which can be read by Xlets. Because PCRs are displaced into new positions in TS, their values should be adjusted based on the time intervals between the original positions and the new positions. We implemented a synchronized application by using our TS generator and MyGetNPT API, where the task of stream events are to display graphic images. We found that graphic images are displayed where 240 ㎳ from their intended time, where 240ms is a human tolerance for the synchronization skew between graphic image and video.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.3 s.345
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• pp.84-94
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• 2006

In this paper, we propose the algorithm to reduce guard time of UWB MAC time slot for throughput gain. In the proposed draft by multiband ofdm alliance (MBOA), Guard time of each medium access slot (MAS) is composed of shortest inter-frame space (SIFS) and MaxDrift which is the time caused by maximum frequency offset among devices. In this paper, to reduceguard time means that we nearly eliminate MaxDrift term from guard time. Each device of a piconet computes relative frequency offset from the device initiating piconet using periodically consecutive transferred beacon frames. Each device add or subtract the calculated relative frequency offset to the estimated each MAS starting point in order to synchronize with calculated MAS starting point of the device initiating piconet. According to verification of simulations, if the frequency offset estimator is implemented with 8 decimal bit, the ratio of the wasted time to Superframe is always less than 0.0001.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.1916-1932
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• 1997

The synchronous stream cipher which require absoulte clock synchronization has the problem of synchronization loss by cycle slip. Synchronization loss makes the state which sender and receiver can't communicate with each other and it may break the receiving system. To lessen the risk, we usually use a continuous resynchronization method which achieve resynchronization at fixed timesteps by inserting synchronization pattern and session key. While we can get resynchronization effectively by continuous resynchroniation, there are some problems. In this paper, we proposed an adaptive resynchronization algorithm for cipher system using HDLC protocol. It is able to solve the problem of the continuous resynchronization. The proposed adaptive algorithm make resynchronization only in the case that the resynchronization is occurred by analyzing the address field of HDLC. It measures the receiving rate of theaddress field in the decision duration. Because it make resynchronization only when the receiving rate is greateer than the threshold value, it is able to solve the problems of continuous resynchronization method. When the proposed adaptive algorithm is applied to the synchronous stream cipher system in packet netork, it has addvance the result in R_e and D_e.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11A
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• pp.882-890
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• 2009

In this paper, we describe a compensation method that can be used for the situation where Loran receivers lose their phase lock to the received Loran signals when Loran signals are employed for the synchronization of national infrastructures such as telecommunication networks, electric power distribution and so on. In losing the phase lock to the received signals in a Loran receiver, the inner oscillator of the receiver starts free-running and the performance of the timing synchronization signals which are locked to the oscillator's phase is very severly degraded, so the timing accuracy under 1 us for a Primary Reference Clock (PRC) required in the International Telecommunications Union (ITU) G.811 standard can not be satisfied in the situation. Therefore, in this paper, we propose a method which can compensate the phase jump by using a compensation algorithm when a Loran receiver loses its phase lock and the performance evaluation of the proposed algorithm is achieved by the Maximum Time Interval Error (MTIE) of the measured data. From the performance evaluation results, it is observed that the requirement under 1 us for a PRC can be easily achieved by using the proposed algorithm showing about 0.6 us with under 30 minutes mean interval of smoothing with 1 hour period when the loss of phase lock occurs.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.12A
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• pp.1002-1008
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• 2003

In terrestrial data broadcasting, we are just on the beginning stage in all aspects including implementation and design techniques and only asynchronous data processing has been receiving a little study. In this paper, we therefore propose an efficient processing algorithm for synchronization of asynchronous data by using trigger information to make more diverse service possible with a variety of contents. In the proposed algorithm, trigger data is encapsulated in DSM-CC section and transmitted in a form of MPEG-2 TS. The data is then separated in PC type set-top box and detached asynchronous data and trigger data are stored by the proposed algorithm. Pre-loaded asynchronous data is displayed when STC(system time clock) has the same value as PTS(presentation time stamp). Proper operation of the proposed algorithm was verified by using a content of asynchronous data with extensible markup language(XML) and a declarative application(DA) browser.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.6
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• pp.1069-1073
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• 2016

The Internet of Things (IoT) is the interconnection of uniquely identifiable embedded computing devices within the existing Internet infrastructure. IoT is expected to offer advanced connectivity of devices, systems, and services that goes beyond machine-to-machine communications and covers a variety of protocols, domains, and applications. Key system-level features that IoT needs to support can be summarized as device heterogeneity, scalability, ubiquitous data exchange through proximity wireless technologies, energy optimized solutions, localization and tracking capabilities, self-organization capabilities, semantic interoperability and data management, embedded security and privacy-preserving mechanisms. Time information is a critical piece of infrastructure for any distributed system. Time information and time synchronization are also fundamental building blocks in the IoT. The IoT requires new paradigms for combining time and data. This paper reviews conventional time keeping mechanisms in the Internet and presents issues to be considered for combining time and data in the IoT.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.4
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• pp.286-294
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• 2011

Cable modems typically are implemented by a forward error correction(FEC) scheme. The ITU-T Recommendation J-38 Annex B specifies using 64- and 256- quadrature amplitude modulation (QAM) and extended RS coding scheme. In implementing the cable modem, there are some problems to fabricate and fitting on FPGA chip. First, many clocks are needed in implementing cable modem because of different code rate and different modulation types. To reduce the number of clocks, we use the two memories, which are different clock speed for reading and writing data. Second, this system lost the bit-synchronization and frame-synchronization in decoder, the system recognize that all data is error. This paper solves the problems by using simple 5-stage registers and unique sync-word. Based on solutions for about problems, the cable modem is fabricated on FPGA chip name as Vertex II pro xc2vp30-5 by Xilinx, and we confirmed the effectiveness of the results.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.831-833
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• 2004

In this paper, an obstacle avoidance algorithm is proposed for a network-based robot considering network delay by distribution. The proposed algorithm is based on the VFH(Vector Field Histogram) algorithm, and for the network-based robot system, in which it is assumed robot localization information is transmitted through network communication. In this paper, target vector for the VFH algorithm is estimated through the robot localization information and the measurement of its delay by distribution. The delay measurement is performed by time-stamp method. To synchronize all local clocks of the nodes distributed on the network, a global clock synchronization method is adopted. With the delay measurement, the robot localization estimation is performed by calculating the kinematics of the robot. The validation of the proposed algorithm is performed through the performance comparison of the obstacle avoidance between the proposed algorithm and the existing VFH algorithm on the network-based autonomous mobile robot.