• Journal of the Institute of Electronics Engineers of Korea TE
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• v.42 no.3
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• pp.7-12
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• 2005

In this paper, we used class D amplification circuit to improve the decline of error rate caused by low impedance in the Power Line Communication. We manufactured voltage drive circuit and current drive circuit that are driven circuit of power line modem on the present and made a comparison experiment with drivel circuit that uses class D amplifier proposed in this paper. As a result of Experiment, We showed that it has great superiority over other existing drive circuits at rapid impedance change in power line channel.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1301-1304
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• 2005

In this paper, we used class D amplification circuit proposed to improve the decline of error rate caused by rapidly variable impedance in the Power Line Communication. We manufactured voltage drive circuit and current drive circuit that are driven circuit of power line modem on the present. And with the same power line modem, we made a comparison experiment applying the driver circuit that used class D amplifier proposed in this paper. As a result of Experiment, We showed that it has more superior than other existing drive circuits at the impedance change in the power line communication.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1673-1681
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• 2015

A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.