• Title/Summary/Keyword: Circuits modeling

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Modeling of 3-D Embedded Inductors Fabricated in LTCC Process (저온 동시소성 공정으로 제작된 3차원 매립 인덕터 모델링)

  • 이서구;최종성;윤일구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.4
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    • pp.344-348
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    • 2002
  • As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

Modeling of Poly-Si TFT and Circuit Simulation for the Analysis of TFT-LCD Characteristics (TFT-LCD 특성 분석을 위한 poly-Si TFT 소자 모델링 및 회로 시뮬레이션)

  • Son, Myung-Sik;Ryu, Jai-Il;Shim, Seong-Yung;Jang, Jin;Yoo, Keon-Ho
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.314-317
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    • 2000
  • In order to analyze the characteristics of complicated TFT-LCD (Thin Film Transistor-Liquid Crystal Display) circuits, it is indispensible to use simulation programs. In this study, we present a systematic method of extracting the input parameters of poly-Si TFT for Spice simulation. This method is applied to two different types of poly-Si TFTs fabricated in our group with good results. Among the Spice simulators, Pspice has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT model on the Pspice simulator, which would contribute to efficient simulations of poly-Si TFT-LCD pixels and arrays.

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A Study on the Mathematical Modeling and Constant Current Adaptive Controller Design for Power LEDs (파워 LED의 수학적 모델링 및 정전류 적응 제어기 설계에 관한 연구)

  • Kim, Eung-Seok;Kim, Young-Tae
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.25 no.9
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    • pp.8-13
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    • 2011
  • In this paper, a mathematical model of the power LED system including the drive circuit will be presented to control the power LEDs current. Using this mathematical model, the constant current adaptive controller will be designed. A constant current drive circuit for power LEDs will be configured using Buck-type converter. Precise constant current controller design is enabled by presenting the mathematical model of power LEDs including the current driving circuits. Using the mathematical model of power LEDs and its drive circuits, the constant current adaptive controller will be designed to obtain the robustness for the parameter uncertainties. In order to verify the validity of the proposed controller, computer simulations are performed.

A Operating by the Direct Thrust Control of SLIM in Conveyor System (반송용 SLIM의 추력제에에 의한 운전특성)

  • 우정인;노태균;신동률;노인배
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.12 no.3
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    • pp.59-66
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    • 1998
  • In this paper, the thrust control of PWM Inverter-Fed SLIM(Single-sided Linear Induction Motor) is achieved with Space Vector control and PI control. The trembling of air gap length which is occurred between the primary winding core and the secondary structure of the SLIM must be minimized in order to get quick response characteristics. First, the equivalent circuits and voltage equations of SLIM are shown on th suitable d-q axis which analyze characteristics of the thrust and the normal force. Also, modeling and analysis of the equivalent circuits transferred d-q axis are able to make robust transient torque from the current regulation in the equivalent circuit. These results exemplified the direct drive of SLIM with the reference speed and torque were verified by experiments.

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High-Frequency Modeling and the Influence of Decoupling Capacitors in High-Speed Digital Circuits (고속 고밀도 디지털 회로에서 사용되는 디커플링 캐패시터의 고주파 모델링과 영향)

  • 손경주;김진양;이해영;최철승;변정건
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.11a
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    • pp.23-27
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    • 2000
  • Simultaneous Switching Noise (SSN) propagated through parallel power and ground planes in high-speed multilayer printed circuit boards (PCBs) causes malfunction of both digital and analog circuits. To reduce SSN, decoupling capacitors are generally used in the PCBs. In this paper, we improve the equivalent circuit model of decoupling capacitor in high-frequency range to analyze the effect of SSN reduction accurately. The analysis is performed by the microwave and RF design system (MDS) method and the finite difference time domain (FDTD) method. We compared the results by the ideal capacitor model with those by the proposed model.

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A Study on AC Modeling of the ESD Protection Devices (정전기 보호용 소자의 AC 모델링에 관한 연구)

  • Choi, Jin-Young
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.136-144
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    • 2004
  • From the AC analysis results utilizing a two dimensional device simulator, the ac equivalent-circuit modeling of the ESD protection devices is executed. It is explained that the ac equivalent circuit of the NMOS protection transistor is modeled by a rather complicated form and that, depending on the frequency range, the error can be large if it is modeled by a simple RC serial circuit. It is also shown that the ac equivalent circuit of the thyristor-type pnpn protection device can be modeled by a simple RC serial circuit. Based on the circuit simulations utilizing the extracted equivalent circuits, the effects of the parasitics in the protection device on the characteristics of LNA are examined when the LNA, which is one of the important RF circuits, is equipped with the protection device. It is explained that a large error can result in estimating the circuit characteristics if the NMOS protection transistor is modeled by a simple capacitor. It is also confirmed that the degradation of the LNA characteristics by incorporating the ESD protection device can be reduced a lot by adopting the suggested pnpn device.

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Pspice Simulation for Nonlinear Components and Surge Suppression Circuits (비선형 소자 및 서지억제회로의 Pspice 시뮬레이션)

  • Lee, Bok-Hui;Gong, Yeong-Eun;Choe, Won-Gyu;Jeon, Deok-Gyu
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.8
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    • pp.477-486
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    • 2000
  • This paper presents Pspice modeling methods for spark gaps and ZnO varistors and describes the application for the two-stage surge suppression circuit which was composed of the nonlinear components. The simulation modelings of nonlinear components were conducted on the basis of the voltage and current curves measured by the impulse current with the time-to-crest of $1~50 \mus$ and the impulse voltage with the rate of the time-to-crest of 10, 100 and 1000 V/\mus$. The firing voltages of the spark gap increased with increasing the rate of the time-to-crest of impulse voltage and the measured data were in good agreement with the simulated data. The I-V curves of the ZnO varistor were measured by applying the impulse currents of which time-to-crests range from 1 to $50 \mus$ and peak amplitudes from 10 A to 2 kA. The simulation modeling was based on the I-V curves replotted by taking away the inductive effects of the test circuit and leads. The meximum difference between the measured and calculated data was of the order of 3%. Also the two-stage surge suppression circuit made of the spark gap and the ZnO varistor was investigated with the impulse voltage of $10/1000\mus$$mutextrm{s}$ wave shape. The overall agreement between the theoretical and experimental results seems to be acceptable. As a consequence, it was known that the proposed simulation techniques could effectively be used to design the surge suppression circuits combined with nonlinear components.

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An Experimental Study upon Modeling and Control of Coupled Engine and Generator System (엔진-발전기 시스템 모델링 및 제어특성에 관한 실험적 연구)

  • 송승호;정세종;오정훈;함윤영;최용각;이광희
    • Transactions of the Korean Society of Automotive Engineers
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    • v.11 no.5
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    • pp.163-169
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    • 2003
  • Modeling of engine-generator system and its control responses are investigated using high performance generator controller. The nonlinear engine is modeled using mean torque production model based on experimental engine map. In case of diesel engine. the amount of injected fief is decided by engine controller depending on the APS(Acceleration Position Sensor) value. An electromechanical generator model contains electrical circuits and moment of inertia. The generator controller maximizes the performance of generator using decoupling and linearized current feedback control. The generator control system consists of 3-phase IGBT inverter and controller board based on 32 bit floating point DSP. Field oriented control algorithm with digital current feedback control at 10kHz sampling enabled high performance torque and speed control of induction machine. Not only the steady state but also the transient state responses can be evaluated through a batch test of the engine generator system. Developed engine and generator modeling and control can be utilized in various applications such as Series Hybrid Electric Vehicle(SHEV), engine-generator for emergency, and other hybrid generation systems.

New Model-based IP-Level Power Estimation Techniques for Digital Circuits (디지털 회로에서의 새로운 모델 기반 IP-Level 소모 전력 추정 기법)

  • Lee, Chang-Hee;Shin, Hyun-Chul;Kim, Kyung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.2 s.344
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    • pp.42-50
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    • 2006
  • Owing to the development of semiconductor processing technology, high density complex circuits can be integrated in a System-on-Chip (SoC). However, increasing energy consumption becomes one of the most important limiting factors. Power estimation at the early stage of design is essential, since design changes at lower levels may significantly lengthen the design period and increase the cost. In this paper, logic level circuits ire levelized and several levels are selected to build power model tables for efficient power estimation. The proposed techniques are applied to a set of ISCAS'85 benchmark circuits to illustrate their effectiveness. Experimental results show that significant improvement in estimation accuracy and slight improvement in efficiency are achieved when compared to those of a well-known existing method. The average estimation error has been reduced from $9.49\%\;to\;3.84\%$.

Field Programmable Gate Array Reliability Analysis Using the Dynamic Flowgraph Methodology

  • McNelles, Phillip;Lu, Lixuan
    • Nuclear Engineering and Technology
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    • v.48 no.5
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    • pp.1192-1205
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    • 2016
  • Field programmable gate array (FPGA)-based systems are thought to be a practical option to replace certain obsolete instrumentation and control systems in nuclear power plants. An FPGA is a type of integrated circuit, which is programmed after being manufactured. FPGAs have some advantages over other electronic technologies, such as analog circuits, microprocessors, and Programmable Logic Controllers (PLCs), for nuclear instrumentation and control, and safety system applications. However, safety-related issues for FPGA-based systems remain to be verified. Owing to this, modeling FPGA-based systems for safety assessment has now become an important point of research. One potential methodology is the dynamic flowgraph methodology (DFM). It has been used for modeling software/hardware interactions in modern control systems. In this paper, FPGA logic was analyzed using DFM. Four aspects of FPGAs are investigated: the "IEEE 1164 standard," registers (D flip-flops), configurable logic blocks, and an FPGA-based signal compensator. The ModelSim simulations confirmed that DFM was able to accurately model those four FPGA properties, proving that DFM has the potential to be used in the modeling of FPGA-based systems. Furthermore, advantages of DFM over traditional reliability analysis methods and FPGA simulators are presented, along with a discussion of potential issues with using DFM for FPGA-based system modeling.