• Title/Summary/Keyword: Circuit simulation

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회로 시뮬레이션을 위한 유기물 쇼트기 다이오드 모델링 (Modeling of Organic Schottky Diodes for Circuit Simulations)

  • 김효종;냠바야르 바타르;김시호
    • 대한전자공학회논문지SD
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    • 제47권6호
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    • pp.7-12
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    • 2010
  • 유기물 쇼트기 다이오드 회로 설계시에 사용가능한 소자의 모델을 구현하였다. AHDL을 이용하여 상용 CAD 환경으로 보편적으로 사용되는 Spectre의 설계환경에서 측정 결과를 입력 파라미터로 반영하여 회로 시뮬레이션을 할 수 있는 환경을 구성하였다. 유기물 RFID의 구현에 필수적인 정류회로를 제작하여 회로의 주파수 특성을 측정하였으며, AHDL 모델을 사용한 시뮬레이션 결과와 비교하였다. 제작된 정류회로의 주파수 특성은 13.56MHz의 RFID 동작을 만족시키기에는 부족하지만, 135kHz 주파수 대역 RFID에서는 동작이 가능하다.

소자 시뮬레이션을 이용한 Circuit Model Parameter 생성에 대한 연구 (The Study of Circuit Model Parameter Generation Using Device Simulation)

  • 이흥주
    • 한국산학기술학회논문지
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    • 제4권3호
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    • pp.177-182
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    • 2003
  • Flash memory는 device 특성상 peripheral circuit을 구성하는 transistor의 종류가 다양하고, 이에 따른 각 transistor의 동작 전압 영역이 넓다. 이에 따라 설계 초기의 전기적 특성 사양 결정을 위해서는, 실리콘상에서 소자의 scale down에 따른 전기적 특성을 선 검증하는 과정이 필수적이었으며, 이로 인해 설계 및 소자 개발의 기간을 단축하기 어려웠다. 본 연구에서는 TCAD tool을 사용하여 실리콘상에서의 제작 공정을 거치지 않고, 효과적으로 model parameter를 생성할 수 있도록 하는 방법을 제안하여 전기적 특성 사양 결정과 설계 단계의 시간 지연을 감소할 수 있도록 한다. 또한 성공적 TCAD tool적용을 위해 필요한 process/device simulator의 calibration methodology와 이를 flash 메모리 소자에 대해 적용 검증한 결과를 분석한다.

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A New Capacitive Sensing Circuit using Modified Charge Transfer Scheme

  • Yeo, Hyeop-Goo
    • Journal of information and communication convergence engineering
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    • 제9권1호
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    • pp.78-82
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    • 2011
  • This paper proposes a new circuit for capacitive sensing based on Dickson's charge pump. The proposed touch sensing circuit includes three stages of NMOS diodes and capacitors for charge transfer. The proposed circuit which has a simplified capacitive touch sensor model has been analyzed and simulated by Spectre using Magna EDMOS technology. Looking from the simulation results, the proposed circuit can effectively be used as a capacitive touch sensing circuit. Moreover, a simple structure can provide maximum flexibility for making a digitally-controlled touch sensor driver with lowpower operations.

A Multi-Level Simulation Technique for Large-ScaleAnalog Integrated Circuits

  • Yang Jeemo
    • 한국산업정보학회:학술대회논문집
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    • 한국산업정보학회 1998년도 공동추계학술대회 경제위기 극복을 위한 정보기술의 효율적 활용
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    • pp.827-834
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    • 1998
  • This paper describes a multi-level simulation technique and its implementation, which accurately solve voltages and currents of circuits descreibed at mixed levels of abstractions. A metho to form a tightly coupled simulation environment is proposed and, starting from a description of a circuit, simulation set-up and analysis procedure of the multi-level simulator for a transient response are presented. Circuit and behavioral simulation techniques and their implementations composing the multi-level simulation are explained in detail. Most of the algorithms implemented in the simulation are based upon the standard simulation techniques in order to obtain the reliability and accuracy of conventinoal simulators. Simulation examples show that the multi-level simulator can analyze circuits containing highly nonlinear behavioral models without loss of accuracy provided the behavioral models are accurate enough.

Cold Flow Simulation of $SF_{6}$ Puffer Circuit Breaker

  • Bae, Chae-Yoon;Jung, Hyun-Kyo;Shin, Sang-In;Park, Oh-Hyun
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제11B권4호
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    • pp.121-128
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    • 2001
  • Numerical schemes for the simulation of the cold gas flow in the SF6 puffer type circuit breaker is presented. The governing equation is axisymmetric compressible Euler Equation and FVM is used to analyze the behavior of flow. The upwind scheme is used to avoid numerical instability and MUSCL is used to obtain high order accuracy. For the efficient calculation, AF-ADI scheme is used. The simulation result shows good agreement with the experimental data.

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Hydro Dynamic Model을 이용한 CMOS의 파괴특성의 Transient Simulation해석 (Transient Simulation of CMOS Breakdown characteristics based on Hydro Dynamic Model)

  • 최원철
    • 한국산업융합학회 논문집
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    • 제5권1호
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    • pp.39-43
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    • 2002
  • In present much CMOS devices used in VLSI circuit and Logic circuit. With increasing a number of device in VLSI, the confidence becomes more serious. This paper describe the mechanism of breakdown on CMOS, especially n-MOS, based on Hydro Dynamic model with device self-heating. Additionally, illustrate the CMOS latch-up characteristics on simplified device structure on this paper.

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전류형 인버터 설계를 위한 전력회로 시뮬레이션 연구 (A Study on Power Circuit Simulation for Design of Current Source Invertera)

  • 최호현;김경서
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1986년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 17-18 Oct. 1986
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    • pp.601-606
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    • 1986
  • In this paper, two methods of power circuit simulation is described in order to obtain the back data for design of current source inverter. One is steady-state analysis by differential equations during the various operating modes. Another method uses switching function, which represents the switching pattern of inverter, and direct-guadrature model of induction motor. The results of digital computer simulation by two methods are compared with the results of laboratory test.

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고속 인쇄회로 기판의 잡음계산 소프트웨어 개발 (Development of a Noise Simulation Software for High Speed Printed Circuit Boards)

  • 이선복;이화이;김대환;한선경;유영갑
    • 전자공학회논문지A
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    • 제30A권3호
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    • pp.95-103
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    • 1993
  • A noise simulation software is developed to estimate crosstalk and reflection noise in multi-layer printed circuit boards having upto 20 layers and carrying signals of 100 MHz range. The simulation software can handle up to 1000 nets yielding accurate noise value associated with each net. The calculation results can be used to build optimal printed citcuit boards used in high speed computers and telecommunication equipments.

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EMI Prediction of Slew-Rate Controlled I/O Buffers by Full-Wave and Circuit Co-Simulation

  • Kim, Namkyoung;Hwang, Jisoo;Kim, SoYoung
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.471-477
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    • 2014
  • In this paper, a modeling and co-simulation methodology is proposed to predict the radiated electromagnetic interference (EMI) from on-chip switching I/O buffers. The output waveforms of I/O buffers are simulated including the on-chip I/O buffer circuit and the RC extracted on-chip interconnect netlist, package, and printed circuit board (PCB). In order to accurately estimate the EMI, a full-wave 3D simulation is performed including the measurement environment. The simulation results are compared with near-field electromagnetic scan results and far-field measurements from an anechoic chamber, and the sources of emission peaks were analyzed. For accurate far-field EMI simulation, PCB power trace models considering IC switching current paths and external power cable models must be considered for accurate EMI prediction. With the proposed EMI simulation model and flow, the electromagnetic compatibility can be tested even before the IC is fabricated.

Sub-threshold MOSFET을 이용한 전류모드 회로 설계 (Current-Mode Circuit Design using Sub-threshold MOSFET)

  • 조승일;여성대;이경량;김성권
    • 한국위성정보통신학회논문지
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    • 제8권3호
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    • pp.10-14
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    • 2013
  • 본 논문에서는 저전력 기술인 DVFS (Dynamic Voltage Frequency Scaling) 응용을 위하여, 동작주파수의 변화에도 소비전력이 일정한 특성을 갖는 전류모드 회로를 적용함에 있어서, 저속 동작에서 소비전력이 과다한 전류모드 회로의 문제점을 전류모드 회로에서 sub-threshold 영역 동작의 MOSFET을 적용함으로써 소비전력을 최소화하는 설계기술을 소개한다. 회로설계는 MOSFET BSIM 3모델을 사용하였으며, 시뮬레이션한 결과, strong-inversion 동작일 때 소비전력은 $900{\mu}W$이었으나, sub-threshold 영역으로 동작하였을 때, 소비전력이 $18.98{\mu}W$가 되어, 98 %의 소비전력의 절감효과가 있음을 확인하였다.