• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2003.11a
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• pp.311-314
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• 2003

In this paper, proposed circuit proposes that Active-Clamp-Circuits basis of a current-fed inverter linked type high frequency resonant dc-dc converter of conventional. and the paper the most of characteristics of the reduced high voltage stress main switches with active clamp circuits and output current constant with the resonant part consists of L, C resonant tank circuit. Also, the capacitor (C$_1$, C$_2$) connected in switches are a common using by resonance capacitor and ZVS capacitor. and circuit analysis used state equation of each part modes. Also we conform a rightfulness theoretical analysis by comparing a parameters values and simulation values obtained from simulation using Power MOS-FET as switching devices.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.853-855
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• 1993

In this paper, a further improved system obtaining very low distorted waveforms of input ac currents of three phase rectifier circuit is proposed. The proposed system consists of an uncomplicated 24 pulse diode bridge rectifier that is transformerless, by adding only switching circuit which consists of two switchs to conventional system. Also to optimum the effectiveness or the harmonic reduction, the optimum turn ratio of an autotransformer and the optimum switching control angle are decided by computer simulation. And then, the voltage waveform obtained has a total harmonic distortion of 8.1%, and the predominant harmonics 23th and 25th. This paper describes operation principle, analysis of the waveforms of input voltage and current. The theoretial results are verified through simulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.529-530
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• 2005

A voltage driving AMOLED(Active Matrix Organic Light Emitting Diode) is useful for large-sized, high resolution OLED display. The conventional 2-TFTs, 1-CAP AMOLED circuit suffer from the threshold voltage variation of TFT. In this paper, a new AMOLED structure is proposed. It is composed of 5-TFTs and 2-capacitors. It is described that the operating principle and the characteristics of the proposed structure and is verified the performance by HSPICE simulation. The result of simulation shows that the effect of the threshold voltage variation in this circuit, is able to neglect.

• ETRI Journal
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• v.41 no.3
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• pp.383-395
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• 2019

Clock Controlled Dual keeper Domino logic structures (CCDD_1 and CCDD_2) for achieving a high-speed performance with low power consumption and a good noise margin are proposed in this paper. The keeper control circuit comprises an additional PMOS keeper transistor controlled by the clock and foot node voltage. This control mechanism offers abrupt conditional control of the keeper circuit and reduces the contention current, leading to high-speed performance. The keeper transistor arrangement also reduces the loop gain associated with the feedback circuitry. Hence, the circuits offer less delay variability. The design and simulation of various wide fan-in designs using 180 nm CMOS technology validates the proposed CCDD_1 and CCDD_2 designs, offering an increased speed performance of 7.2% and 8.5%, respectively, over a conventional domino logic structure. The noise gain margin analysis proves good robustness of the CCDD structures when compared with a conventional domino logic circuit configuration. A Monte Carlo simulation for 2,000 runs under statistical process variations demonstrates that the proposed CCDD circuits offer a significantly reduced delay variability factor.

• Journal of the Semiconductor & Display Technology
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• v.21 no.3
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• pp.130-134
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• 2022

An anti-reflective coating is used to improve the performance of the solar cell. The anti-reflective coating changes the value of the short-circuit current about the thickness. However, the current-voltage characteristics about the anti-reflective coating are difficult to calculate without simulation tool. In this paper, a modeling technique to determine the short-circuit current value and the current-voltage characteristics in accordance with the thickness is proposed. In addition, artificial neural network is used to predict the short-circuit current with the dependence of temperature and thickness. Simulation results incorporating the artificial neural network model are obtained using MATLAB/Simulink and show the current-voltage characteristic according to the thickness of the anti-reflective coating.

• Journal of Korean Elementary Science Education
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• v.34 no.4
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• pp.357-371
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• 2015

Even after learning electric current, elementary school students have various non-scientific conceptions and difficulties. Because flow of charge is not visible. Also elementary school students do not learn theory but phenomena, so they cannot transfer theoretical perspective to new situation. In this research, we have designed instruction based on PhET simulation visualizing flow of electric charge and applied it to 37 science-gifted students in elementary school for measuring conceptual understanding. As a result, six out of the seven Hake gains of question set are high gain and just one is middle gain because the students have understood the flow pattern of the charge through circuit elements such as light bulbs, wire, as well as battery with PhET simulation and it gives a chance to create various questions spontaneously about electric current. Also they become able to do spontaneous mental simulation without PhET simulation about flow of charges. This research, suggest that developed materials using PhET simulation could be used as not only program for gifted students in elementary school, but also the electrical circuit section in an elementary science curriculum.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.3
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• pp.207-214
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• 2016

Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.131-134
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• 2002

In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

• ETRI Journal
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• v.38 no.2
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• pp.272-279
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• 2016

In this paper, a new structure for an advanced high holding voltage silicon controlled rectifier (AHHVSCR) is proposed. The proposed new structure specifically for an AHHVSCR-based electrostatic discharge (ESD) protection circuit can protect integrated circuits from ESD stress. The new structure involves the insertion of a PMOS into an AHHVSCR so as to prevent a state of latch-up from occurring due to a low holding voltage. We use a TACD simulation to conduct a comparative analysis of three types of circuit - (i) an AHHVSCR-based ESD protection circuit having the proposed new structure (that is, a PMOS inserted into the AHHVSCR), (ii) a standard AHHVSCR-based ESD protection circuit, and (iii) a standard HHVSCR-based ESD protection circuit. A circuit having the proposed new structure is fabricated using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology. The fabricated circuit is also evaluated using Transmission-Line Pulse measurements to confirm its electrical characteristics, and human-body model and machine model tests are used to confirm its robustness. The fabricated circuit has a holding voltage of 18.78 V and a second breakdown current of more than 8 A.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.16-23
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• 2003

In this paper, we propose an efficient bias circuit of discrete BJT component for hearing aid. The collector feedback bias circuit, widely used for the hearing aid, has a resistor for negative feedback. As the resistor affects AC and DC simultaneously, it is quite difficult to adjust amplifier gain without changing DC bias point. The previous bias circuit also has weak point to be oscillated by the positive feedback of power noise if gain of hearing aid is high. In the proposed circuit, we can reduce the two weak points of the previous circuit by adding a resistor to the collector feedback bias circuit between base and power supply which is $\beta$ times target than the collector resistor. Thus. we can change amplifier gain without changing DC bias point, and reduce power noise gain about 18.5% compare to that of tile previous circuit in the simulation.