• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.11
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• pp.2193-2198
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• 2016

In this study, we propose an algorithm to simulate the function of the coupling structure and having two neurons to find out exactly recover the temporary or permanent position errors that can occur during operation in a digital circuit was separated by function, a $3{\times}3$ array. If any particular part in the combined cells are differentiated cells have a problem that function to other cells caused an error and perform the same function are subjected to a step of apoptosis by the surrounding cells. Designed as a function block in the function and the internal structure having a cell structure of this digital circuit proposes an algorithm. In case of error of module 4 of block 1 considered in this study, sum of all module numbers for horizontal direction, total module number sum for vertical direction, and sum of all module numbers for diagonal direction, We were able to find the location.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.202-206
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• 2012

In this paper, we proposed on the direction of self-repairing mimicking the cell on the digital system design. Three-dimensional array of cells rather than using the original structure of FPGA, an array of blocks for efficient error detection methods were investigated. With a certain regularity, so the design method in detail by dividing the full array. The digital circuits can be detected fault location easily and quickly.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.6
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• pp.1306-1311
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• 2012

In this paper, we proposed on the direction of self-repairing mimicking the cell on the digital system design. Three-dimensional array of cells rather than using the original structure of FPGA, an array of blocks for efficient error detection methods were investigated. With a certain regularity, so the design method in detail by dividing the full array. The digital circuits can be detected fault location easily and quickly.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.993-999
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• 2007

With the introduction of the RAMS(Reliability, Availability, Maintainability, Safety), the interest of the system assurance has been increased. First of all, fast-growing electronic circuit requires analyzing the failure rates, by dividing the signalling system more specifically. Since 2005, the K.N.R (Korean National Railway) has incorporated ERP(Enterprise Resource Planning) in order to establish the complete status as the top international comprise, therefore while ordering the project, it has established the classification system and then has been applying to ERP system in 2007. Due to the complex of the classification system, the reliability analysis of the signalling system was assessed with the limit of IXL ATP with On-board and wayside equipment. This paper assumed MTBF(Mean Time Between Failure), MTTR((Mean Time Between Repair) of total signalling system, by using the classification of ERP program.

• Electronics and Telecommunications Trends
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• v.32 no.6
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• pp.27-39
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• 2017

A variety of medical devices are utilized to repair or help injured body functions after accidental injury(such as a traffic accident), population aging, or disease. Such medical devices are being actively researched and developed in portable form, skin patchable type, and further, implantable form. In the future, active implantable medical devices for neuro and brain sciences are expected to be developed. Active implantable medical devices that detect brain signals and control neurology for a wider understanding of human cognition and nerve functions, and for an understanding and treatment of various diseases, are being actively pursued for future use. In this paper, the core elements of implantable devices that can be applied to neuro and brain sciences are classified into electrode technologies for bio-signal acquisition and stimulation, analog/digital circuit technologies for signal processing, human body communication technologies, wireless power transmission technologies for continuous device use, and device integration technologies to integrate them. In each chapter, the latest technology development trends for each detailed technology field are reviewed.

• Aerospace Engineering and Technology
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• v.7 no.2
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• pp.58-66
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• 2008

In the space environment, many other things to design electronic circuits should be considered with respect to commercial circuit design. The first thing is that electronics in space are likely to be exposed to radiation effects and the second thing is that it is impossible to repair or replace electronic parts after once spacecraft was launched. In this severe situation, very strict and tight worst case analysis conditions should be applied to the electronics in space environment to do its own function well without any problems during the overall mission period. So this paper summarizes worst case input conditions and methods which are specified in the ESA Worst Case Analysis Specification (ECSS-Q-30-01A) and proposes the results of Worst Case Analysis for one simple electronic circuit which is implemented at a real On-Board Computer in the Low Earth Orbit Satellite.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.2
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• pp.51-56
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• 2008

High quality power supplying of high voltage distribution lines electric railway system is the important function, high voltage distribution system is complicated witch is compose with distribution line, circuit break, protection facilities and so on. Among this components, role of substation is most important for elevation of reliability in electric power system. Therefore, the enhanced reliability considering the preventive inspection, repair work replacement is necessary. This paper proposes protection method in railway high voltage distribution lines. we model distribution system using PSCAD/EMTDC(Power System Computer Aided Design/Electro Magnetic Transients DC Analysis Program) and extract various fault data. In conclusion this methods can protection of ground fault.

• Journal of IKEEE
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• v.24 no.3
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• pp.691-698
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• 2020

The installation cost or the magnitude of the fault current varies depending on the grid connection method of the offshore wind farm. Therefore, there is a need for an efficient power grid connection method considering the capacity and location of the complex. In particular, most power cables in offshore wind farms use 3-core considering cost and efficiency. In the event of a failure such as a short circuit, the entire cable must be replaced, which can lead to significant losses in terms of cost, considering repair costs and turbine downtime. Therefore, in this paper, a radial, ring, and molding method is introduced into a 100 MW wind farm to be installed at Jeju offshore, and a three-phase short circuit failure is performed using a PSCAD/EMTDC program to perform computer analysis. I would like to propose a suitable power grid connection method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.10
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• pp.2123-2135
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• 1997

In this paepr, we consider resistive shorts on drain-source, drain-gate, and gate-source as well as opens in MOSFETs included in typical memory cell of VLSI SRAM. Behavior of memeory is observed by analyzing voltage at storage nodes of memeory and IDDQ(quiescent power supply current) through PSPICE simulation. Using this behavioral analysis, an effective testing algorithm of complexity O(N) which can be applied to both functional testing and IDDQ testing simultaeously is proposed. Built-In Self Test(BIST) circuit which detects faults in memories and Built-In Current Sensor(BICS) which monitors the power supply bus for abnormalities in quescent current are developed and imprlemented to improve the quality and efficiency of testing. Implemented BIST and BICS circuits can detect locations of faults and defects in order to repair faulty memories.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.11
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• pp.4720-4738
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• 2015

Proper management on user-driven virtual circuits (VCs) is essential for seamless operation of virtual networks. The Network Provisioning System (NPS) is useful software for creating user-driven VCs automatically and must take fault management into account for physical layer impairments on user-driven VCs. This paper addresses a user-driven and trusty protection management in an NPS with an open standard Network Service Interface (NSI), as a contribution to show how to implement the user-driven and trusty protection management required for user-driven VCs. In particular, it provides a RESTful web service Interface for Configuration and Event management (RICE) that enable management of a distinguished data and control plane VC status between Network Service Agents (NSAs) in the event of a node or link fault and repair in a domain. This capability represents a contribution to show how network and protection events in a domain can be monitored between NSAs (NPSs with the NSI) in multiple domains. The implemented NPS controls and manages both the primary and backup VC with disjoint path in a user-driven manner. A demonstration to verify RICE API's capability is addressed for the trusty protection in the dynamic VC network.