• Title/Summary/Keyword: Circuit optimization

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Improvement of COF Bending-induced Lead Broken Failure in LCD Module (LCD Module내 COF Bending에 따른 Lead Broken Failure의 개선)

  • Shim, Boum-Joo;Choi, Yeol;Yi, Jun-Sin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.3
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    • pp.265-271
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    • 2008
  • TCP(Tape Carrier Package), COG (Chip On Glass), COF(Chip On Film) are three methods for connecting LDI(LCD Driver IC) with LCD panels. Especially COF is growing its portion of market place because of low cost and fine pitch correspondence. But COF has a problem of the lead broken failure in LCD module process and the usage of customer. During PCB (Printed Circuit Board) bonding process, the mismatch of the coefficient of thermal expansion between PCB and D-IC makes stress-concentration in COF lead, and also D-IC bending process during module assembly process makes the level of stress in COF lead higher. As an affecting factors of lead-broken failure, the effects of SR(Solder Resister) coating on the COF lead, surface roughness and grain size of COF lead, PI(Polyimide) film thickness, lead width and the ACF(Anisotropic Conductive Film) overlap were studied, The optimization of these affecting manufacturing processes and materials were suggested and verified to prevent the lead-broken failure.

OPAMP Design Using Optimized Self-Cascode Structures

  • Kim, Hyeong-Soon;Baek, Ki-Ju;Lee, Dae-Hwan;Kim, Yeong-Seuk;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.3
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    • pp.149-154
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    • 2014
  • A new CMOS analog design methodology using an independently optimized self-cascode (SC) is proposed. This idea is based on the concept of the dual-workfunction-gate MOSFETs, which are equivalent to SC structures. The channel length of the source-side MOSFET is optimized, to give higher transconductance ($g_m$) and output resistance ($r_{out}$). The highest $g_m$ and $r_{out}$ of the SC structures are obtained by independently optimizing the channel length ratio of the SC MOSFETs, which is a critical design parameter. An operational amplifier (OPAMP) with the proposed design methodology using a standard digital $0.18-{\mu}m$ CMOS technology was designed and fabricated, to provide better performance. Independently $g_m$ and $r_{out}$ optimized SC MOSFETs were used in the differential input and output stages, respectively. The measured DC gain of the fabricated OPAMP with the proposed design methodology was approximately 18 dB higher, than that of the conventional OPAMP.

Optimization on the Characteristics of DC Discharge Cell in the AND Gate PDPs (ADN Gate PDP의 DC 방전셀 방전특성 최적화)

  • Ryeom, Jeong-Duk
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.3
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    • pp.34-39
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    • 2004
  • This research investigated the influence on the 4 cell of DC discharge on the side of the discharge characteristic. This DC discharge cells are that composes AND gate of AND gate PDP newly proposed. As for the discharge starting voltage of this discharge cell of 4 pieces, it has been understood that there is deeply a relation up to the space charge generated from the discharge of adjoining discharge cell through the experiment. The discharge voltages which had become each discharge cell optimizations from the experiment result were decided. Moreover, the width of the margin of two AND input voltages is wide and the AND function occurs clearly. However, it has been qualitatively understood that it is difficult enough to obtain the operation margin of the DC priming discharge used to address discharge of PDP.

Optimization of the Performance of Microbial Fuel Cells Containing Alkalophilic Bacillus sp.

  • CHOI, YOUNGJIN;JOOYOUNG SONG;SEUNHO JUNG;SUNGHYUN KIM
    • Journal of Microbiology and Biotechnology
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    • v.11 no.5
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    • pp.863-869
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    • 2001
  • A systematic study of microbial fuel cells comprised of alkalophilic Bacillus sp. B-31 has been carried out under various operating conditions. A significant amount of electricity was generated when redox mediators were used. Among the phenothiazine-type redox dyes tested, azure A was found to be the most effective both in maintaining a high cell voltage and for the long-term operation. The maximum efficiency was and for the long-term operation. The maximum efficiency was obtained at ca. $50^{\circ}C$ giving an open circuit voltage of 0.7V. A small change in temperature did not significantly affect the cell performance, but a rapid decrease in performance was observed below $20^{\circ}C$ and above $70^{\circ}C$. It was noticeable that fuel cell efficiency and discharge pattern depended strongly on the carbon source used in the initial culture medium. Regardless of the initial carbon sources, only glucose and trehalose were utilized as substrates. Galactose, however, was not substantially utilized except when galactose was used in the initial medium. Glucose, in particular, showed $87\%$ coulombic efficiency, which was the highest value ever reported, when Bacillus sp. was cultured in a maltose-containing medium. This study demonstrates that highly efficient microbial fuel cells can be constructed with alkalophilic microorganisms by fine-tuning the operating conditions and by carefully selecting carbon sources in the initial culture medium.

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A Method to reduce time of path planning optimization for AOI machines (AOI 검사기의 경로 계획 최척화 처리 시간 단축 방안)

  • Baek, Sunwoo
    • Proceedings of the Korea Information Processing Society Conference
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    • 2016.10a
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    • pp.518-519
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    • 2016
  • AOI 검사기는 SMT 공정 상에서 PCB (printed Circuit Board) 상의 부품들을 카메라로 촬영하고 촬영된 영상을 2D 혹은 3D 형태의 이미지로 재구성하고 분석하여 이상 여무를 판단하는 장비다. 검사를 하고자 하는 PCB의 크기가 카메라가 촬영할 수 있는 영역 보다 큰 경우가 대부분이기 때문에 PCB 상에 마운트 되어 있는 부품들을 모두 촬영하기 위해서는 여러 차례 나누어 촬영해야 할 필요가 있으며 이 때문에 PCB 상에 촬영해야 하는 부품들을 가능한 FOV에 많이 포함될 수 있도록 여러 FOV 영역으로 나누고 이렇게 나누어진 FOV 영역들을 최적의 경로로 이동하며 촬영할 수 있도록 하기 위한 알고리즘이 필요하다. 기존 논문들은 대부분 이 문제를 해결하기 위한 알고리즘에 대해 다루어 왔다. 일반적으로 생산이 진행되는 시점에서는 검사해야 할 PCB에 대한 정보 (PCB의 크기, 부품의 위치, 크기, 종류 등)는 이미 정해져 있기 때문에 경로 계획 최적화 수행은 PCB 정보에 변동이 없다면 한차례만 하면 된다. 하지만 검사를 할 수 있도록 Teaching 하는 단계에서는 PCB 정보가 지속적으로 변경될 수 있으며 이에 따라 최적화를 여러 차례 수행해야 할 필요성이 있다. 최적화를 위한 처리 시간은 부품의 개수, PCB 상에서의 분포정도등에 따라 증가하기 때문에 PCB 정보가 변경될 때 마다 최적화를 수행하게 되면 비효율적으로 처리 시간이 증가하게 된다. 본 논문에서는 이 문제에 대해 연구하고 해결책을 제시하였다.

Sound Control of Structural-acoustic Coupling System Using Optimum Layout of Absorbing Material and Damping Material (흡음재 및 제진재의 최적배치를 이용한 구조-음향 연성계의 소음제어)

  • Kim, Dong-Young;Hong, Do-Kwan;Ahn, Chan-Woo
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.15 no.2 s.95
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    • pp.161-168
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    • 2005
  • The absorbing material is mostly used to changing the acoustic energy to the heat energy in the passive control, and that consists of the porous media. That controls an air borne noise while the stiffened plates, damping material and additional mass control a structure borne noise. The additional mass can decrease the sound by mass effect and shift of natural frequency, and damping material can decrease the sound by damping effect. The passive acoustic control using these kinds of control materials has an advantage that is possible to control the acoustic in the wide frequency band and the whole space at a price as compared with the active control using the various electronic circuit and actuator. But the space efficiency decreased and the control ability isn't up to the active control. So it is necessary to maximize the control ability in the specific frequency to raise the capacity of passive control minimizing the diminution of space efficiency such an active control. Therefore, the characteristics of control materials and the optimum layout of control materials that attached to the boundary of structure-acoustic coupled cavity were studied using sequential optimization on this study.

Laser Micro-drilling of Sapphire/silicon Wafer using Nano-second Pulsed Laser (나노초 펄스 레이저 응용 사파이어/실리콘 웨이퍼 미세 드릴링)

  • Kim, Nam-Sung;Chung, Young-Dae;Seong, Chun-Yah
    • Journal of the Korean Society for Precision Engineering
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    • v.27 no.2
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    • pp.13-19
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    • 2010
  • Due to the rapid spread of mobile handheld devices, industrial demands for micro-scale holes with a diameter of even smaller than $10{\mu}m$ in sapphire/silicon wafers have been increasing. Holes in sapphire wafers are for heat dissipation from LEDs; and those in silicon wafers for interlayer communication in three-dimensional integrated circuit (IC). We have developed a sapphire wafer driller equipped with a 532nm laser in which a cooling chuck is employed to minimize local heat accumulation in wafer. Through the optimization of process parameters (pulse energy, repetition rate, number of pulses), quality holes with a diameter of $30{\mu}m$ and a depth of $100{\mu}m$ can be drilled at a rate of 30holes/sec. We also have developed a silicon wafer driller equipped with a 355nm laser. It is able to drill quality through-holes of $15{\mu}m$ in diameter and $150{\mu}m$ in depth at a rate of 100holes/sec.

A Relay Selection and Power Allocation Scheme for Cooperative Wireless Sensor Networks

  • Qian, Mujun;Liu, Chen;Fu, Youhua;Zhu, Weiping
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.4
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    • pp.1390-1405
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    • 2014
  • This paper investigates optimal relay selection and power allocation under an aggregate power constraint for cooperative wireless sensor networks assisted by amplify-and-forward relay nodes. By considering both transmission power and circuit power consumptions, the received signal-to-noise ratio (SNR) at the destination node is calculated, based on which, a relay selection and power allocation scheme is developed. The core idea is to adaptively adjust the selected relays and their transmission power to maximize the received SNR according to the channel state information. The proposed scheme is derived by recasting the optimization problem into a three-layered problem-determining the number of relays to be activated, selecting the active relays, and performing power allocation among the selected relays. Monte Carlo simulation results demonstrate that the proposed scheme provides a higher received SNR and a lower bit error rate as compared to the average power allocation scheme.

Improvement with Speed Response of Moving Magnet Type LDM (가동자석형 LDM의 속도응답특성 개선)

  • Maeng, In-Jae;Baek, Soo-Hyun;Kim, Yong;Yoon, Shin-Yong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.14 no.5
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    • pp.19-26
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    • 2000
  • In this paper, to improve the mechanical response of the Moving Magnet Type LDM, the design of the LDM was optimized to achieve a large force to volume ratio without reduction the force. The model of the LDM and its optimization procedure were developed on the initial assumption that the magnetic circuit is linear. To analyze the magnetic flux distribution throughout the volume of the LDM and the slider back iron, a 2D finite element analysis of the LDM was performed.

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An Efficient PCB Assembly Method by Multiple Adsorption with Gantry Type SMD using Simulation (갠트리 타입 SMD에서 동시 흡착에 의한 효율적 PCB 조립 방안의 시뮬레이션 연구)

  • Moon, Gee-Ju;Kim, Gwang-Pil
    • Journal of the Korea Society for Simulation
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    • v.15 no.4
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    • pp.59-67
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    • 2006
  • An efficient PCB assembly method with Gantry type machine is developed and proposed in this paper to improve system productivity. Nozzle changes at Gantry type machine is the major reason causing lower system performance instead of header and slot movements on the other type machines. The problem is attacked by maximizing multiple adsorptions to reduce the number of necessary nozzle changes with Gantry type machine. It is designed to reduce the assembly time per PCB with multiple adsorptions based upon the positions of feeders and nozzles. A simulation model is constructed to show the effectiveness of the suggested heuristic and necessarily a comparison study is followed with different methods on selection of next assembly feeder and nozzle with various cases.

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