• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.3
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• pp.176-182
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• 2021

This research proposes a high-frequency circuit that can accurately predict the differential mode noise of single-phase inverters at the circuit design stage. Proposed single-phase inverter high frequency circuit in the work is a form in which harmonic impedance components are added to the basic single-phase inverter circuit configuration. For accurate noise prediction, parasitic components present in each part of the differential noise path were extracted. Impedance was extracted using a network analyzer and Q3D in the measurement range of 150 kHz to 30 MHz. A high-frequency circuit model was completed by applying the measured values. Simulations and experiments were conducted to confirm the validity of the high-frequency circuit. As a result, we were able to predict the resonance point of the differential mode voltage extracted as an experimental value with a high-frequency circuit model within an approximately 10% error. Through this outcome, we could verify that differential mode noise can be accurately predicted using the proposed model of the high-frequency circuit without a separate test bench for noise measurement.

• Journal of electromagnetic engineering and science
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• v.5 no.4
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• pp.204-207
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• 2005

In this paper, PBG structure and feedforward circuit has been used to suppress the phase noise of the oscillator. Microstrip line resonator have low Q, but we can obtain high LO power by feedforward circuit and improve the resonator Q by the PBG, simultaneously. The proposed oscillator which uses PBG and feedforward circuit shows 0${\~}$20 dB phase noise reduction compared to the conventional oscillator. We have obtained -115.8 dBc of phase noise at 100 kHz offset from 2.4 GHz center.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1881-1884
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• 2003

In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11b
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• pp.204-209
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• 2002

A PDP(Plasma Display Panel) module consists of a discharge panel, a SMPS(Switched Mode Power Supply) for power supply, driving boards for panel control, and a logic board. Driving boards supply high voltage pulses to induce glow discharge in the PDP panel. The electrical pulses excite the circuit elements and subsequently generate acoustic noises. The main sources of the noise in the circuit are the transformer of SMPS and the power MOSFET(Metal Oxide Semiconductor Field Effect Transistor) of driving boards, and the heat sinks often amplify the noise level. The reduction of the acoustic noises was achieved by modifying both the structural and circuit elements. The structural method was executed by the improvement of heat sinks. The optimization of SMPS and condensers was carried out for the circuit elements.

• Journal of information and communication convergence engineering
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• v.15 no.2
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• pp.112-116
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• 2017

In this work, we demonstrated a low noise and high linearity low noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with novel active bias circuit for LTE applications. The device technology used in this work relies on a process involving a $0.25-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT). The LNA MMIC with a novel active bias circuit has a small signal gain of $19.7{\pm}1.5dB$ and output third order intercept point (OIP3) of 38-39 dBm in the frequency range 1.75-2.65 GHz. The noise figure (NF) is less than 0.58 dB over the full bandwidth. Compared with the characteristics of the LNA MMIC without using the novel active bias circuit, the OIP3 is improved about 2-3 dBm. The small signal gain and NF showed no significant change after using the active bias circuit. The novel active bias circuit indeed improves the linearity performance of the LNA MMIC without degradation.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.80-86
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• 2014

A low-noise readout circuit is studied for 2-D capacitive microbolometer focal plane arrays (FPAs). In spite of the merits of the integration method, a simple and effective pixelwise readout circuit without integration is used for input circuit because of a small pixel size and narrow noise bandwidth. To reduce the power consumption and the kT/C noise, which is the dominant noise of the capacitive microbolometer FPAs with small capacitance, a new correlated double sampling (CDS) is used for columnwise circuit. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed circuit effectively reduces the kT/C noise and the other low-frequency noise of microbolometer, and the noise characteristics of the fabricated chip have been verified by measurements. The rms noise voltage of the proposed circuit is reduced from 30 % to 55 % compared to that of the simple readout input circuit, and the noise equivalent temperature difference (NETD) of the proposed circuit is very low value of 21.5 mK.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.897-904
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• 2011

In this paper, a novel circuit topology of a low-noise amplifier tunable at 1.8GHz band for PCS and 2.4GHz band for WLAN using a CMOS active inductor is proposed. This circuit topology to reduce higher noise figure of the low noise amplifier with the CMOS active load is analyzed. Furthermore, the noise canceling technique is adopted to reduce more the noise figure. The noise figure of the proposed circuit topology is analyzed and simulated in $0.18{\mu}m$ CMOS process technology. Thus, the simulation results exhibit that the noise performance enhancement of the tunable low noise amplifier is about 3.4dB, which is mainly due to the proposed new circuit topology.

• Journal of IKEEE
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• v.13 no.2
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• pp.248-252
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• 2009

In this paper, analysis of a noise factor and an effective power strategy for the OLED dc-dc converter are described. One of the main reasons that one may not design the OLED power for dc-dc converter is that OLED's panel noise is composed of FFN(Frame Frequency Noise) and LFN(Line Frequency Noise). Into the bargain, FFN is caused by both the dc-dc (circuit) and driving circuit. It is hard to get rid of FFN, baeause FFN has very little results value for our ears. LFN is adjusted by analog compensation value. Actually, that is more important problem than FFN. It is known that voltage divider for OLED's mode variation is not good for compact power design. In the end, a circuit design for understanding OLED's noise and a novel muti-channel dc-dc converter were presented.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.212-216
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• 2001

Because conventional switching converters have been usually using unbalanced circuit topologies, parasitic capacitance between the drain/collector of an active switch and the frame ground through its heat sink may generate the common-mode conducted noise. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common-mode conducted noise. As an example, a boost converter version of the balanced switching converter was presented and the mechanism of the common-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switching converter circuit and presents a buck-boost converter version of the balanced switching converter. The feature of common-mode noise reduction is confirmed by experimental results and the mechanism of the common-mode noise reduction is explained using equivalent circuits.

• Journal of Advanced Marine Engineering and Technology
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• v.18 no.2
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• pp.75-82
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• 1994

The existence of peroodic impulse noises in distribution line carrier (DLC) communication system is known to be the most serious obstacle for improving DLC communication quality in reliability and capacity. From the spectral points, impulse noises can be divided into baseband type and modulation type the noise width of whichs are much different each other. With each nose type, this study presents the basic characteristics in relation to what they originate from and how their spectrum properties are revealed. The baseband type impulse noise is normally caused from thyristor circuit running with low switching speed and the modulation type noise from the circuit of switching power supply. The base wave of modulation noise is shown to be the pulsuatic charging current to primary condenser in switching power circuit. The study result indicates also that placing the DLC carrier frequency away the band predominated by modulated noise especially from RCC type switching power circuit is very important in DLC design.