• 제목/요약/키워드: Circuit noise

검색결과 1,301건 처리시간 0.027초

차동 노이즈 분석을 위한 단상 인버터 고주파 회로 모델링 및 검증 (Single Phase Inverter High Frequency Circuit Modeling and Verification for Differential Mode Noise Analysis)

  • 신주현;생차야;김우중;차한주
    • 전력전자학회논문지
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    • 제26권3호
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    • pp.176-182
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    • 2021
  • This research proposes a high-frequency circuit that can accurately predict the differential mode noise of single-phase inverters at the circuit design stage. Proposed single-phase inverter high frequency circuit in the work is a form in which harmonic impedance components are added to the basic single-phase inverter circuit configuration. For accurate noise prediction, parasitic components present in each part of the differential noise path were extracted. Impedance was extracted using a network analyzer and Q3D in the measurement range of 150 kHz to 30 MHz. A high-frequency circuit model was completed by applying the measured values. Simulations and experiments were conducted to confirm the validity of the high-frequency circuit. As a result, we were able to predict the resonance point of the differential mode voltage extracted as an experimental value with a high-frequency circuit model within an approximately 10% error. Through this outcome, we could verify that differential mode noise can be accurately predicted using the proposed model of the high-frequency circuit without a separate test bench for noise measurement.

A Novel Phase Noise Reduction In Oscillator Using PBG(Photonic Band Gap) Structure and Feedforward Circuit

  • Seo, Chul-Hun
    • Journal of electromagnetic engineering and science
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    • 제5권4호
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    • pp.204-207
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    • 2005
  • In this paper, PBG structure and feedforward circuit has been used to suppress the phase noise of the oscillator. Microstrip line resonator have low Q, but we can obtain high LO power by feedforward circuit and improve the resonator Q by the PBG, simultaneously. The proposed oscillator which uses PBG and feedforward circuit shows 0${\~}$20 dB phase noise reduction compared to the conventional oscillator. We have obtained -115.8 dBc of phase noise at 100 kHz offset from 2.4 GHz center.

DC Motor Drive with Circuit Balancing Technique to Reduce Common Mode Conducted Noise

  • Jintanamaneerat, Jintanai;Srisawang, Arnon;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.1881-1884
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    • 2003
  • In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

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PDP 모듈의 소음 저감 (Noise Reduction of PDP Module)

  • 최수용;이석영;주재만;강정훈;오상경
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2002년도 추계학술대회논문집
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    • pp.204-209
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    • 2002
  • A PDP(Plasma Display Panel) module consists of a discharge panel, a SMPS(Switched Mode Power Supply) for power supply, driving boards for panel control, and a logic board. Driving boards supply high voltage pulses to induce glow discharge in the PDP panel. The electrical pulses excite the circuit elements and subsequently generate acoustic noises. The main sources of the noise in the circuit are the transformer of SMPS and the power MOSFET(Metal Oxide Semiconductor Field Effect Transistor) of driving boards, and the heat sinks often amplify the noise level. The reduction of the acoustic noises was achieved by modifying both the structural and circuit elements. The structural method was executed by the improvement of heat sinks. The optimization of SMPS and condensers was carried out for the circuit elements.

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Low Noise and High Linearity GaAs LNA MMIC with Novel Active Bias Circuit for LTE Applications

  • Ryu, Keun-Kwan;Kim, Yong-Hwan;Kim, Sung-Chan
    • Journal of information and communication convergence engineering
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    • 제15권2호
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    • pp.112-116
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    • 2017
  • In this work, we demonstrated a low noise and high linearity low noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with novel active bias circuit for LTE applications. The device technology used in this work relies on a process involving a $0.25-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT). The LNA MMIC with a novel active bias circuit has a small signal gain of $19.7{\pm}1.5dB$ and output third order intercept point (OIP3) of 38-39 dBm in the frequency range 1.75-2.65 GHz. The noise figure (NF) is less than 0.58 dB over the full bandwidth. Compared with the characteristics of the LNA MMIC without using the novel active bias circuit, the OIP3 is improved about 2-3 dBm. The small signal gain and NF showed no significant change after using the active bias circuit. The novel active bias circuit indeed improves the linearity performance of the LNA MMIC without degradation.

정전용량 방식의 이차원 마이크로볼로미터 FPA를 위한 저잡음 신호취득 회로 설계 (Design of Low Noise Readout Circuit for 2-D Capacitive Microbolometer FPAs)

  • 김종은;우두형
    • 전자공학회논문지
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    • 제51권10호
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    • pp.80-86
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    • 2014
  • 본 연구를 통해서 정전용량 방식의 이차원 마이크로볼로미터를 위한 저잡음 신호취득 회로를 연구하였다. 잡음 대역폭이 매우 낮고 픽셀 면적이 작기 때문에 비 적분형 방식의 간단하고 효과적인 픽셀 단위의 회로를 사용했다. 또한, 가장 문제가 되는 kT/C 잡음을 줄이고 전력소모를 낮추기 위해 새로운 CDS 방식을 열 단위의 회로에 사용했다. 제안하는 회로는 $0.35-{\mu}m$ 2-poly 4-metal CMOS 공정을 이용하여 설계했고, 마이크로볼로미터의 픽셀 크기는 $50{\mu}m{\times}50{\mu}m$이다. 제안하는 신호취득회로는 볼로미터의 kT/C 잡음 등을 포함한 저주파 잡음을 효과적으로 제거하며, 제작된 칩에 대한 잡음 측정을 통하여 이를 검증하였다. 제안하는 회로는 간단한 신호취득 회로에 비해 그 잡음을 30 %에서 55 % 이하까지 개선할 수 있으며, 전체 감지시스템의 잡음등가온도차(NETD)를 21.5 mK 정도로 낮출 수 있다.

CMOS 능동 인덕터를 이용한 동조가능 저잡음 증폭기의 잡음성능 향상에 관한 연구 (Study on Noise Performance Enhancement of Tunable Low Noise Amplifier Using CMOS Active Inductor)

  • 성영규;윤경식
    • 한국정보통신학회논문지
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    • 제15권4호
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    • pp.897-904
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    • 2011
  • 본 논문에서는 CMOS 능동 인덕터를 이용하여 1.8GHz PCS 대역과 2.4GHz WLAN 대역에서 동조가 가능한 저잡음 증폭기의 새로운 회로구조를 제안하였다. CMOS 능동 인덕터 부하를 이용하는 저잡음 증폭기의 높은 잡음지수를 줄이기 위한 회로구조와 잡음지수를 더욱 감소시키기 위한 잡음상쇄기법을 적용하고 해석하였다. 이 동조가능 저잡음 증폭기를 $0.18{\mu}m$ CMOS 공정기술로 시뮬레이션을 수행한 결과는 잡음성능이 약 3.4dB 향상된 것을 보여주며, 이는 주로 제안된 새로운 회로구조에 기인한다.

A development of noise improvement dc-dc converter for PM OLED module

  • Park, Sung-Joon
    • 전기전자학회논문지
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    • 제13권2호
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    • pp.248-252
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    • 2009
  • In this paper, analysis of a noise factor and an effective power strategy for the OLED dc-dc converter are described. One of the main reasons that one may not design the OLED power for dc-dc converter is that OLED's panel noise is composed of FFN(Frame Frequency Noise) and LFN(Line Frequency Noise). Into the bargain, FFN is caused by both the dc-dc (circuit) and driving circuit. It is hard to get rid of FFN, baeause FFN has very little results value for our ears. LFN is adjusted by analog compensation value. Actually, that is more important problem than FFN. It is known that voltage divider for OLED's mode variation is not good for compact power design. In the end, a circuit design for understanding OLED's noise and a novel muti-channel dc-dc converter were presented.

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Balanced Buck-Boost Switching Converter to Reduce Common-Mode Conducted Noise

  • Shoyama Masahito;Ohba Masashi;Ninomiya Tamotsu
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.212-216
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    • 2001
  • Because conventional switching converters have been usually using unbalanced circuit topologies, parasitic capacitance between the drain/collector of an active switch and the frame ground through its heat sink may generate the common-mode conducted noise. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common-mode conducted noise. As an example, a boost converter version of the balanced switching converter was presented and the mechanism of the common-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switching converter circuit and presents a buck-boost converter version of the balanced switching converter. The feature of common-mode noise reduction is confirmed by experimental results and the mechanism of the common-mode noise reduction is explained using equivalent circuits.

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배전선반송 데이타통신에서의 주기적 임펄스노이즈의 발생특성 (The Originating Characteristics of Periodic Impulse Noises in the Data Communication System by Distribution Line Carrier Method)

  • 최순만;노창주
    • Journal of Advanced Marine Engineering and Technology
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    • 제18권2호
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    • pp.75-82
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    • 1994
  • The existence of peroodic impulse noises in distribution line carrier (DLC) communication system is known to be the most serious obstacle for improving DLC communication quality in reliability and capacity. From the spectral points, impulse noises can be divided into baseband type and modulation type the noise width of whichs are much different each other. With each nose type, this study presents the basic characteristics in relation to what they originate from and how their spectrum properties are revealed. The baseband type impulse noise is normally caused from thyristor circuit running with low switching speed and the modulation type noise from the circuit of switching power supply. The base wave of modulation noise is shown to be the pulsuatic charging current to primary condenser in switching power circuit. The study result indicates also that placing the DLC carrier frequency away the band predominated by modulated noise especially from RCC type switching power circuit is very important in DLC design.

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