• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2002년도 추계학술대회논문집
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• pp.228-233
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• 2002

General modeling of a resonant shunting damper has been made from piezoelectric sensor/actuator equation. It is found that an additional damping, which is augmented to a system, is generated by the shunt damping effect. The transfer function of the tuned electrical absorber is derived for both series and parallel shunt circuit. The governing equations and associated boundary conditions are derived using Hamilton's Principle. The shunt voltage equation is also derived from the charge generated in PZT due to beam vibration. The frequency response function of the obtained mathematical model is compared with that of the tuned electrical absorber and experimental work. The vibration amplitude is reduced about 15 dB at targeted second mode frequency.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.139-142
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• 2001

As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1506-1508
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• 2001

We have investigated for the modeling and the simulation of the ferroelectric capacitor and MFS TFT (Metal-Ferroelectric-Semiconductor Thin Film transistor). For ferroelectric capacitor modeling, we adopted the equivalent circuit model which consists of a nonlear capacitor, a nonliner resistor, and a linear capacitor. MFS TFT have been modeled by combining the ferroelectric capacitor and Bsim3 MOSFET model. Our simulations show the characteristics of ferroelectric capacitor and MFS TFT.

• 전자공학회논문지S
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• 제35S권1호
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• pp.122-129
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• 1998

For generation and analysis of the multi-sensory image, we propose a new three dimensional (3D) modeling method considering an iternal heat source. We represent the heat conduction process within th object as an equivalent thermal circuit. Therefore, without a complex computation, our modeling approach can obtain thermal features of the object. By using the faceted model, the proposed method can express the accurate visual signatures of the object. Comparing the estimates datum with the obtained surface temperatures, we have demonstrated that the proposed method can provide a precise thermal features. The thermal images by out model is applicable to simulate a tracking loop of an IR missile.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.601-604
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• 2002

In this paper, the timing do-skew modeling for a high speed logic tester channels is developed. The time delay of each channel in a logic tester are different from other channels and it can produce timing error in a test. To get the best timing accuracy in the test with a logic tester, the timing skew must be compensated. The timing skew of channels is due to the difference of time delay of pin-electronics devices composing channels and length of metal line placed on PCB. The expected timing difference of channels can be calculated according to the specifications of pin electronics devices and strip line modeling of PCB. With the calculated delay time, the timing skew compensation circuit has been designed. With the timing skew compensation circuit, the timing calibration of a logic tester can be peformed easily and automatically without other time measuring instruments. The calibration method can then be directly applied to logic testers in mass production lines.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2000년도 추계학술대회논문집 - 한국공작기계학회
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• pp.83-89
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• 2000

This paper presents a dynamic modeling and a sliding mode controller for the high-speed / high-accuracy position control system. Selected target system is the wire bonder head assembly which is used in semiconductor assembly process. This system is a reciprocating one around the pivot point that consists of VCM(voice coil motor) as a actuator and transducer horn as a bonding tool. For the modeling elements, the system is divided into electrical circuit, magnetic circuit and mechanical system. Each system is modeled by using the bond graph method and united into the full system. Two major aims are considered in the design of the controller. The first one is that the horn must track the given reference trajectory. The second one is that the controller must be realizable by using the DSP board. Computer simulation and experimental results show that the designed sliding mode controller provides better performance than the PID controller.

• Journal of Power Electronics
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• 제12권6호
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• pp.912-924
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• 2012

In hybrid renewable power systems, the use of a multiple-input dc/dc converter (MIC) leads to simpler circuit and lower cost, when compared to the conventional use of several single-input converters. This paper proposed a novel three-input buck/boost/buck-boost converter, which can be used in applications with various values of input voltage. The energy sources in this converter can deliver power to the load either simultaneously or individually in one switching period. The steady relationship, the power management strategy and the small-signal circuit model of this converter have been derived. With decoupling technology, modeling and regulator design can be obtained under multi-loop control modes. Finally, three generating methods of a multiple-input buck/boost/buck-boost converter is given, and this method can be extended to the other multiple-input dc/dc converters.

• 한국전기전자재료학회논문지
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• 제15권4호
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• pp.344-348
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• 2002

As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• 반도체디스플레이기술학회지
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• 제16권3호
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• pp.59-64
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• 2017

As the demand on displays increases, new thin-film transistors such as metal oxide transistor are continuously being invented. When designing a circuit consisting of such new transistors, a new transistor model based on proper charge transport mechanisms is needed for each of them. In this paper, a modeling framework which enables to choose charge transport mechanisms that are limited to certain operation regions and assemble them into a transistor model instead of making an integrated transistor model dedicated to each transistor. The framework consists of a graphic user interface to choose charge transport models and a current calculation part, which is also implemented in AIM-SPICE for circuit simulation.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.36-39
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• 2000

The adaptive learning circuit is designed the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportioned to the source-drain resistance of MFSFET and the capacitance of the circuit. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of imput pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, the frequency modulation characteristics of the adaptive learning circuit, that is, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse are confirmed.