• 대한전자공학회논문지
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• 제24권4호
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• pp.618-624
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• 1987

This paper describes the design and fabrication of a signal processing integrated circuit required for the recording and playback of VTR audio signal. The integrated circuit was designed using 8\ulcorner design rule and its chip size is 2.5x2.5mm\ulcorner It was fabricated using SST bipolar standard process technology. The measurement analysis of the fabricated circuit proves the satisfactory DC characteristics and its proper audio signal processing funcstion.

• 대한전자공학회논문지
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• 제27권4호
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• pp.612-619
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• 1990

In this paper, a design method of optical FSK transmitter is described using LD-FM circuit model. In the design of optical FSK transmitter, an optimum bias current was chosen using LD-FM circuit model, and an unequalized FM transfer function was determined at this current. The equalizers that can make this transfer function uniform were designed by use of a simple passive network. For the designed optical FSK transmitter, the pulse-transient and small-signal frequency-deviation responses were simulated and discussed.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2002년도 학술대회 논문집
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• pp.131-134
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• 2002

In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

• 한국전기전자재료학회논문지
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• 제25권1호
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• pp.53-57
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• 2012

In this paper, by designing 20 W class driving circuit for driving high-power LED (Light Emitting Diode), we are going to comparatively carry out the analysis of characteristics for power circuit according to each design method. In this case, 200 V 60 Hz was performed as input data. The electrical characteristics such as voltage, current and ripple are checked for constant current circuit and constant voltage circuit in the LED module. In addition, as the ripple has an influence on illumination of LED light, low temperature working (-20 [$^{\circ}C$]) and high temperature working(80 [$^{\circ}C$]) are measured to make sure the ripple characteristics in accordance with temperature. In low temperature operation -20 [$^{\circ}C$] measurements, both constant current circuit and constant-voltage circuit were less impacted on input fluctuation, whereas in the high temperature operation 80 [$^{\circ}C$], current voltage in constant voltage circuit was surge after 430 [hour]. Voltage current ripple of constant current circuit was much less than constant voltage circuit, therefore we can show that constant current circuit is more stable.

• 한국통신학회논문지
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• 제10권1호
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• pp.42-47
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• 1985

본 논문에서는 대각선으로 출력이 1이 되는 양수 =1을 실현하는 간단한 논리회로를 제시하며 동시에 2출력을 갖는 ROM구조의 $\textrm{I}^2\textrm{L}$에 의한 다치논리회로의 설계를 제시한다. 제시된 회로는대칭적인 다치진리치표의 회로설계와 독립변수를 갖는 다치진리치표의 회로설계에 적합하다. 또한 Galois field(GF) 다치진리치표에 적용하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.574-578
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• 1988

This paper proposes testable design method of Domino CMOS NOR-NOR Array Logic design method. Previous Domino CMOS PLA method is composed of 2 level NAND-NAND Logic. Because NOR-NOR Logic is realized by a parallel circuit, this method can prevent delay time each level and DNOR-PLA include testable circuit system that DNOR-PLA circuit. DNOR-PLA testable algorithm is realized on Prime (Primos) in Pascal language and DNOR-PLA circuit is simulated by PSPICE.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.529-530
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• 2006

An efficient sensing scheme adoptable in DC-DC converter is described. The output voltage of the whole DC-DC converter is fed back to the input voltage of the sensor. The comparison in the sensor is accomplished by a current push-pull action. With a fixed reference, the comparator can be embodied based on (W/L) ratios. The current-mode scheme benefits the system better than a conventional voltage-mode one in terms of small area, low power consumption.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -1
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• pp.191-194
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• 2000

A level of integration will increase, if the number of elements of the circuit can be reduced. We aim to design the circuit of the new system for any further integration by using Neuron MOS Transistor. In this paper, we consider to introduce Soft-Hardware Logic and multiple-valued logic to the design methods for reducing the number of elements and inner wiring. We have designed 4-valued add-subtracter circuit using above logic. We discuss the design methods, features, and characteristics of this circuit by SPICE simulation.

• 대한전자공학회논문지
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• 제18권2호
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• pp.14-21
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• 1981

전류변환 GIC 연산증폭기의 실제 특성을 고려하여 구성하고, 그 입력 admittance에 이 특성의 영향이 최소가 되도록 회로조건과 각 소자를 선정하였다. 또 각 소자에 기생하는 분포용량들을 보상하기 위한 회로를 고안하여 GIC회로에 접속하였다. 이 GIC회로를 수동여파기 회로망의 임의점에 삽입해서 능동화하는 RC 여파기의 설계방법을 상세히 설명하고, 이 방법에 예로 대성여파기를 설계하고 실험을 통해서 이 설계법의 타당성을 실증하였다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.804-807
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• 2005

In this paper, a double scotch yoke mechanism for moving simultaneously the fixed contact and moving contact of a gas circuit brake, is proposed and designed to improve the breaking characteristics of the circuit breaker. Firstly, the design parameters of the scotch yoke are kinematically determined from the desired design condition of the circuit breaker. Next, the stroke curve of the moving contact is designed by considering the design parameter and the specified opening characteristics of electric contacts. Based on the scotch yoke and stroke curve, the dynamics of the electric contacts is analyzed using ADAMS model of switch mechanism.