• Journal of Sensor Science and Technology
• /
• v.6 no.4
• /
• pp.307-315
• /
• 1997

In this paper, a sample chamber which provide easy replacement of ISFET sensor and consume only small sample volume for electrolyte analysis is designed and a 4-channel electrolyte analyzer employing 2-point calibration method is implemented. In addition, we proposed sample loading detection circuit for minimizing sample and calibration solutions and implemented it. Developed electrolyte analyzer consists of control system part and flow system part. For the effective control of the developed hardware, system software is developed as three individual routines ; measuring routine, calibration routine and washing routine.

• Environmental Engineering Research
• /
• v.19 no.3
• /
• pp.269-274
• /
• 2014

On-site sanitation systems are typically installed to treat grey and toilet wastewaters in areas without sewer and centralized treatment systems. It is well known that, due to inappropriate design and operation, treatment performance of these systems in developing countries is not satisfactory in the removal of pathogens and organic matters. This research aimed to investigate the hydraulic conditions occurring in some on-site sanitation systems and the effects of hydraulic retention times (HRTs) on the system performance. The experiments were conducted with a laboratory-scale septic tank (40L in size) and an actual septic tank (600L in size), to test the hydraulic conditions by using tracer study with HRTs varying at 12, 24 and 48 hr. The experimental results showed the dispersion numbers to be in the range of 0.017-0.320 and the short-circuit ratios in the range of 0.014-0.031, indicating the reactors having a high level of sort-circuiting and approaching complete-mix conditions. The removal efficiency of $BOD_5$ was found to be 67% and the $k_{30}$ values for $BOD_5$ was $2.04day^{-1}$. A modified complete-mix model based on the relationship between $BOD_5$ removal efficiencies and HRTs was developed and validated with actual-scale septic tank data having a correlation coefficient ($R^2$) of 0.90. Therefore, to better protect our environment and minimizing health risks, new generation toilets should be developed that could minimize short-circuiting and improving treatment performance.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.23 no.12
• /
• pp.127-135
• /
• 2009

In this paper, the Interleaved AC/DC boost converter using two inductor with voltage-doubler characteristic when it operates with a duty cycle greater than 0.5 is proposed. Generally, the low-line(Input AC 110[V]) operation of the AC/DC boost converter is much less efficient than high-line (Input AC 220[V]) operation. The proposed Interleaved AC/DC boost converter operates as a voltage doubler at low-line. Its low-line range have higher power factor and improved efficiency compared with that of conventional converter. This research proposed the Interleaved AC/DC boost converter for voltage-doubler characteristic. The principle of operation, feature and design considerations is illustrated and the validity of verified through the experiment with a 300[W] based experimental circuit.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.2
• /
• pp.265-272
• /
• 2011

This study designed and manufactured "a DVOR virtual signal generator" to make the monitoring system of preliminary Doppler VHF Omni-directional Radio Range(DVOR) run like its real operation status in a narrow space in order to study "a DVOR virtual monitoring system". The designed and manufactured DVOR virtual signal generator is suitable for the specification of signal that is generated in the currently running equipment. In addition, it is possible to control operation conditions of equipment by using parameter variables, and the circuit construction is largely divided into the input part, the modulation part, the high-gain amplifier, and the power part. "The DVOR virtual monitoring system using the virtual signal designed and implemented in this study is very suitable to be used for low-cost actual education as it can construct the operation status like the real situation in a narrow space without using an actual system like an antenna generating side band.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.7
• /
• pp.1267-1271
• /
• 2009

In this paper, a diplexer circuit to separate GSM from CDMA band is designed using a LTCC (Low Temperature Cofired Ceramic) multi-layer technology. In order to increase a integration capability of the diplexer, it is designed using 3-dimensional (3-D) multi-layer compact inductor and capacitors in e-layer LTCC substrate with a relative dielectric constant of 7. In order to achieve high selectivity of the bands, a shunt capacitor and inductor are designed in the high-pass filter (HPF) and low-pass filter (LPF), respectively. The size of the fabricated diplexer including CPW pads is 3,450 ${\times}$4,000 ${\times}$694 ${\mu}m^3$An insertion loss (IL) and return loss in GSM band are less than -1.35dB and more than -5.66dB,respectively. In the case of CDMA band, the IL of -1.54dBandRLof above -9.30dBare archived.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.7
• /
• pp.1371-1378
• /
• 2009

We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.3
• /
• pp.216-220
• /
• 2013

The rated voltage has been rising in order to minimize the losses in power transmission. The high voltage electric machines should be minimized due to the constraints of space. Therefore, the temperature of high voltage electric apparatuses easily exceeds the temperature limits. In this paper, it is investigated that how to minimize the internal temperature rising of a high voltage switchgear by adjusting the arrangement of bus bars. High voltage switchgears consist of a circuit breaker, a CT, a PT, a earthing switches, bus bars, and so on. It is very difficult to estimate the electromagnetic properties of a high voltage switchgear due to these various environments and structures. In this paper, analyses are focused on the electromagnetic characteristics of bus bars according to the arrangement method and the enclosures to simplify the electromagnetic characteristics of a switchgear. It is found that the characteristics of electric field intensity and electromagnetic losses in bus bars are influenced by the arrangement method of bus bars. However, it is confirmed that the electromagnetic characteristics of enclosures are not affected by the arrangement of bus bars. In this paper, the arrangement methods of bus bars to minimize the electric field intensity and electromagnetic losses are suggested. It is expected that the research results are helpful to design and develop an electrically reliable high voltage switchgear.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.27 no.10
• /
• pp.623-629
• /
• 2014

For the semiconductor device safety from over current in the digital electronic circuit system must be surely designed that it's surface mount type micro fuse device. In this paper, We has analysed to the fusing character of micro fuse as a function changed thickness of thermosetting ink epoxy. To the change of thermosetting ink epoxy thickness with in production lot, in the electrically character (fusing test in the 2 multiple over current and 10 multiple over current, surface temperature test in the 1.25 multiple over current) of micro fuse has been tested. According to the electrically character result, changed thickness of thermosetting ink epoxy in designed micro fuse withheld direct effect in both end resistance changes. Also, because high thermal energy in the micro fuse test of over current was occurred to effect such as thermal runaway and explosion. Therefore, screen printing process in the design of micro fuse using thermosetting ink epoxy is very important for production quality improvement.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.5
• /
• pp.857-862
• /
• 2008

This paper evaluate the performance using a simulated 490KHz narrow band filter based on characteristic parameters appropriately extracted from 490KHz band-pass filter after considering each characteristic, which is modeled on equivalent circuit and applied to NAVTEX receiver using crystal oscillator. The evaluation results show that the value of a series capacitor of crystal oscillator has only little capacity by Cs=21.094fF and the bandwidth characteristics of filter go worse as the capacity value of crystal oscillator grow increase. Moreover, the series inductance value of crystal oscillator has a relatively big value by L=5H, therefore the bandwidth characteristic according as inductance's capacity shows more little effect than the capacity.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.1
• /
• pp.130-136
• /
• 2008

This paper describes a low-power high-performance analog front-end block for $UHF(860{\sim}960MHz)$ band RFID tag chips. It satisfies ISO/IEC 18000-6 type C(EPCgolbal class1. generation2.) and includes a memory block for test. For reducing power consumption, it operates with a internally generated power supply of 1V. An ASK demodulator using a current-mode schmitt trigger is proposed and designed. The proposed demodulator has an error rate as low as 0.014%. It is designed using a 0.18um CMOS technology. The simulation results show that the designed circuit can operate properly with an input as low as $0.2V_{peak}$ and consumes $2.63{\mu}A$. The chip size is $0.12mm^2$