• 제목/요약/키워드: Circuit design

검색결과 5,384건 처리시간 0.046초

사출금형 냉각회로의 최적설계자동화에 관한 연구 (A Study on automatic optimization of cooling circuit design in injection mold)

  • 장형건;정현우;이영주;이병옥
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2007년도 추계학술대회 논문집
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    • pp.262-265
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    • 2007
  • Cooling circuit of injection mold affects part quality and cycle time of injection molding process. Examination on mold cooling circuit is usually omitted in part design stage because cooling circuit is designed in the mold design stage. It is desirable to examine mold cooling circuit with respect to part quality in the part design stage. In order to make the examination process convenient and fast, cooling circuit design should be automated without intervention of skilled designer. In this study, optimization of cooling circuit design is automated with commercial softwares; Visual DOC and Moldflow MPI. Effect of initial value for optimization is examined for the optimization result.

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LED 조명의 안전회로설계 Type분석에 따른 최적설계 (The Optimum Design According to Type Analysis of the Safety Circuit Design)

  • 장인혁;김정호;임홍우;오근태;최연옥
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제16권4호
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    • pp.331-337
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    • 2016
  • Purpose: The purpose of this study is the analysis of the failure mechanisms effect of circuit design characteristics of the ballast for LED Lamp Methods: Recently, electronic circuit of ballasts for LED lamp are being occurred on various failure mechanisms (whiskers, ion migration, heat dissipation problem, switching element damage) because electronic ballast circuit design characteristics are becoming more and more diverse. Results: we analysis failure mechanisms that occurs in accordance with the circuit design characteristics The ballast for LED lamp were divided into three different types (Type A, Type B, Type C) considering circuit design characteristics (thermal design, PCB patten spacing, element material) and it was experimented in the acceleration test conditions ($85^{\circ}C$, 85% R.H). Conclusion: We confirmed that failure mechanism of the ballast for LED Lamp had occurred differently in accordance with the circuit design characteristics.

최적회로 연결선 구조를 위한 설계 및 해석도구 (DATOIS) (Design and analysis tool for optimal interconnect structures (DATOIS))

  • 박종흠;김준희;김석윤
    • 전자공학회논문지C
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    • 제35C권7호
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    • pp.20-29
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    • 1998
  • As the packing density of ICs in recent submicron IC design increases, interconnects gain importance. Because interconnects directly affect on two major components of circuit performance, power dissipation and operating speed, circuit engineers are concerned with the optimal design of interconnects and the aid tool to design them. When circuit models of interconnects are given (including geometry and material information), the analysis process for the given structure is not an easy task, but conversely, it is much more difficult to design an interconnect structure with given circuit characteristics. This paper focuses on the latter process that has not been foucsed on much till now due to the complexity of the problem, and prsents a design aid tool(DATOIS) to synthesize interconnects. this tool stroes the circuit performance parameters for normalized interconnect geometries, and has two oeprational modes:analysis mode and synthesis mode. In the analysis mode, circuit performance parameters are obtained by searching the internal database for a given geometry and interpolates results if necessary . In thesynthesis mode, when a given circuit performance parameter satisfies a set of geometry condition in the database, those geometry structures are printed out.

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표류신뢰도를 고려한 경제적 회로 설계에 대한 몬테칼로법의 적용 (An Application of the Monte Carlo Method to the Economical Circuit Design in Consideration of the Drift Reliability)

  • 차균현
    • 전기의세계
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    • 제24권5호
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    • pp.72-80
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    • 1975
  • In this paper an application of the Monte Carlo method to optimum circuit design is discussed. T. Tsuda and T. Kiyono's algorithm based on the Monte Carlo method for solving multiple simul-taneous nonlinear equations is generalized to apply it to finding solutions of the constrained nonlinear optimization problem. The generalized algorithm derived here is directly applied to economical circuit design. In the cirsuit design, the object function is a cost function which is related to the cost of each circuit component. The constraint is the variance of the total system expressed by the variances of each circuit component. The design is to be determined so that the circuit has specified drift reliability with minimum cost. A practical example of economical circuit design and a general nonlinear function minimization is presented with food results.

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전류 방식 MRAM의 데이터 감지 기법 (Sensing scheme of current-mode MRAM)

  • 김범수;조충현;황원석;고주현;김동명;민경식;김대정
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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    • pp.419-422
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    • 2004
  • A sensing scheme for current-mode magneto-resistance random access memory (MRAM) with a 1T1MTJ cell structure is proposed. Magnetic tunnel junction (MTJ) resistance, which is HIGH or LOW, is converted to different cell currents during READ operation. The cell current is then amplified to be evaluated by the reference cell current. In this scheme, conventional bit line sense amplifiers are not required and the operation is less sensitive to voltage noise than that of voltage-mode circuit is. It has been confirmed with HSPICE simulations using a 0.35-${\mu}m$ 2-poly 4-metal CMOS technology.

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동적모델에 기반한 고압회로차단기의 설계 및 해석 (Design and Analysis of Power Circuit Breaker Mechanism Based on the Dynamic Model)

  • 권병희;안길영;오일성;서정민;김수현
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2001년도 춘계학술대회논문집B
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    • pp.476-481
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    • 2001
  • In this paper, based on the developed dynamic model of a vacuum circuit breaker mechanism, the development of the new circuit breaker with less energy mechanism is focused. The energy flow analysis of the original mechanism is carried out to show where the elastic potential energies of pre-loaded springs are transmitted. Through energy flow analysis, the concept design of the new circuit breaker with less energy mechanism is proposed, and then the detailed design is carried out through the design process based on the verified dynamic model. Comparing simulation results with experiment using a high-speed camera, the appropriateness of the proposed design procedures for the rapid circuit breaker mechanism is shown.

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고장 검풀이 용이한 Zipper CMOS 회로의 설계 (Testable Design for Zipper CMOS Circuits)

  • ;임인칠
    • 대한전자공학회논문지
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    • 제24권3호
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    • pp.517-526
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    • 1987
  • This paper proposes a new testable design for Zipper CMOS circuits. This design provides an additional feedback loop (called self oscillation loop) whichin the circuit, for testability. The circuit is tested only by observing the oscillation on the loop. The design can be applied to the multistage as well as the single stage, and can detect multiple faults which are undetectable by the conventional testing method. The application and evaluation of test patterns become easy and fault-free responses are not necessary. If the conventional testing method is applied to the sequential Zipper CMOS circuit with the LSSD design technique, it has the serious defect that the initial value may change due to intermediate test patterns and much time taken to apply the necessary test patterns. By using the proposed design, however, the sequential Zipper CMOS circuit with the LSSD design technique can be easily tested without such a defect. Also, the validity of the design is verified by performing the circuit level simulation.

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다이렉트사이클릭그래프에 기초한 디지털논리시스템 설계 (Digital Logic System Design based on Directed Cyclic graph)

  • 박춘명
    • 한국인터넷방송통신학회논문지
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    • 제9권1호
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    • pp.89-94
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    • 2009
  • 본 논문에서는 경로수 ${\zeta}$로 주어진 DCG(Directed Cyclic Graph)의 입출력간의 연관관계를 고효율디지털논리회로로 설계하는 알로리즘과 DCG의 각 노드들에 코드를 할당하는 알고리즘을 제안하였다. 본 논문에서는 기존 알고리즘의 문제점을 도출한 후, 다른 접근방법으로써 DCG의 경로수로 부터 행렬방정식을 유도한 후 이를 통해 DCG의 경로수에 따른 회로설계 알리즘을 제안하였으며, 설계된 회로와 함께 DCG의 특성을 만족하도록 노드들에 대한 코드를 할당하는 알고리즘을 제안하였다. 본 논문에서 제안한 고효율디지털논리회로설계 알고리즘은 기존의 알고리즘으로는 가능하지 않았던 경로수의 DCG에 대하여 회로설계가 가능하게 되었고, 보다 최적화된 디지털논리회로를 구현할 수 있음을 확인하였다. 본 논문에서 제안한 회로설계 알고리즘을 통해 임의의 자연수를 경로수로 갖는 DCG에 대한 설계가 가능하며, 입출력단자 수의 감소. 회로구성의 간략화, 연산속도의 향상과 비용감소 등의 잇점이 있고, 예제를 통해 본 논문에서 제안한 알고리즘의 적합성과 타당성을 검증하였다.

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안정적인 정전류 구동 방식의 파이로 스퀴브 회로 설계 (Pyro Squib Circuit Design with Stable Constant Current Driving Method)

  • 소경재
    • 한국군사과학기술학회지
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    • 제25권5호
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    • pp.545-551
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    • 2022
  • We proposed a design method for constant current pyro squib circuit. The current method using N MOSFET for the stability problem has a weakness of the current change, requiring a new design. This paper identified the problem with conventional squib circuit where the current is reduced by 25 % when maximum resistance is 3 ohms. Thus, we proposed a stable constant current driving circuit using P MOSFET and PNP BJT. We confirmed stable constant circuit operation through simulations and measurements of the proposed circuit design where the current did not change until the resistance reached 3 ohms.

동적모델에 기반한 진공 회로차단기의 설계 (Design of Vacuum Circuit Breaker Based on Dynamic Model)

  • 권병희;안길영
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2003년도 춘계학술대회 논문집
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    • pp.1418-1421
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    • 2003
  • The Vacuum circuit breaker is a kind of power circuit breaker and protect electric devices from over-current. In this paper we built a dynamic model of VCB driving mechanism using ADAMS. The development of the new circuit breaker with less energy and more compactable mechanism is focused. Through the dynamic model, the concept design of the new circuit breaker with less energy and more compactable mechanism is proposed, and then the detailed design is carried out through the design process based on the dynamic model.

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