• Title/Summary/Keyword: Chip removing

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Design of Metamaterial-Inspired Wideband Absorber at X-Band Adopting Trumpet Structures

  • Kim, Beom-Kyu;Lee, Bomson
    • Journal of electromagnetic engineering and science
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    • v.14 no.3
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    • pp.314-316
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    • 2014
  • This letter presents two types of metamaterial-inspired absorbers adopting resistive trumpet structures at the X band. The unit cell of the first type is composed of a trumpet-shaped resonator loading a chip resistor, a metallic back plane, and a FR4 (${\varepsilon}_r=4.4-j0.02$) substrate between them (single-layer). The absorption rate is 99.5% at 13.3 GHz. The full width at half maximum (FWHM) is 95 % at 11.2 GHz (from 5.9 to 16.5 GHz). The size of unit cell is $5.6{\times}5.6{\times}2.4mm^3$. The second type has been optimized with a $7{\Omega}$/square uniform resistive coating, removing the chip resistors but leading to results comparable to the first type. The proposed absorbers are almost insensitive to polarizations of incident waves due to symmetric geometry.

Development of Drilling Jig by Practical and Adaptive Tooling System(Part 2)

  • Sim, Sung-Bo;Lee, Sung-Taeg
    • Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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    • 2000.04a
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    • pp.177-180
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    • 2000
  • This is the continue paper as part 2 in this study. In order to prevent the production defects, the optimum design of product, jig and fixture and their making are very significant devision. especially the result of tryout and its analysis become the characteristics of this paper that nothing might be ever seen before such as this type of research method on all processes.

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An Efficient Architecture of The MF-VLD (MF-VLD에 대한 효율적인 하드웨어 구조)

  • Suh, Ki-Bum
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.11
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    • pp.57-62
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    • 2011
  • In this paper, an efficient architecture for MFVLD(Multi-Format Variable Length Decoder) which can process H.264, MPEG-2, MPEG-4, AVS, VC-1 bitstream is proposed. The proposed MF-VLD is designed to be adapted to the MPSOC (Multi-processor System on Chip) architecture, uses bit-plane algorithm for the processing of inverse quantized data to reduce the width of AHB bus. External SDRAM is used to minimize the internal memory size. In this architecture, the adding or removing each variable length decoder can be easily done by using multiplexor. The designed MF-VLD can be operated in 200MHz at 0.18um process. The gate size is 657K gate and internal memory size is 27Kbyte.

Fabrication of Metallic Nano-Filter Using UV-Imprinting Process (UV 임프린팅 공정을 이용한 금속막 필터제작)

  • Noh Cheol Yong;Lee Namseok;Lim Jiseok;Kim Seok-min;Kang Shinill
    • Transactions of Materials Processing
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    • v.14 no.5 s.77
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    • pp.473-476
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    • 2005
  • The demand of on-chip total analyzing system with MEMS (micro electro mechanical system) bio/chemical sensor is rapidly increasing. In on-chip total analyzing system, to detect the bio/chemical products with submicron feature size, a filtration system with nano-filter is required. One of the conventional methods to fabricate nano-filter is to use direct patterning or RIE (reactive ion etching). However, those procedures are very costly and are not suitable fur mass production. In this study, we suggested new fabrication method for a nano-filter based on replication process, which is simple and low cost process. After the Si master was fabricated by laser interference lithography and reactive ion etching process, the polymeric mold was replicated by UV-imprint process. Metallic nano-filter was fabricated after removing the polymeric part of metal deposited polymeric mold. Finally, our fabrication method was applied to metallic nano-filter with $1{\mu}m$ pitch size and $0.4{\mu}m$ hole size for bacteria sensor application.

LTCC기술을 활용한 VCO모듈

  • 이영신;유찬세;이우성;강남기
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.3
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    • pp.12-24
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    • 2001
  • The key advantage of LTCC(low temperature co-fired ceramics) technology is the ability to integrate passive components such as resistors, capacitors, and inductors. More compact circuits with an increased scale of integration are needed with the development for advanced telecommunication system such as IMT-2000. LTCC technology can be obtained by removing these elements from the substrate surface to inside of ceramic body. And it can miniaturize the wireless phone through integration of planar patch antenna, duplexer, band pass filter, bias line, circuit of impedance matching and RF choke etc. Futhermore, with the multilayer chip process and its outstanding electrical material characteristics, LTCC is predestined for highly-integrated, cost effective wide band applications. This paper focuses on the general description of LTCC MCM technologies and the fabrication of the multilayer VCO module.

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Test Data Compression for SoC Testing (SoC 테스트를 위한 테스트 데이터 압축)

  • Kim Yun-Hong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.5 no.6
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    • pp.515-520
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    • 2004
  • Core-based system-on-a-chip (SoC) designs present a number of test challenges. Two major problems that are becoming increasingly important are long application time during manufacturing test and high volume of test data. Highly efficient compression techniques have been proposed to reduce storage and application time for high volume data by exploiting the repetitive nature of test vectors. This paper proposes a new test data compression technique for SoC testing. In the proposed technique, compression is achieved by partitioning the test vector set and removing repeating segment. This process has $O(n^{-2})$ time complexity for compression with a simple hardware decoding circuitry. It is shown that the efficiency of the proposed compression technique is comparable with sophisticated software compression techniques with the advantage of easy and fast decoding.

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Design and Implementation of $160\times192$ pixel array capacitive type fingerprint sensor

  • Nam Jin-Moon;Jung Seung-Min;Lee Moon-Key
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.82-85
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    • 2004
  • This paper proposes an advanced circuit for the capacitive type fingerprint sensor signal processing and an effective isolation structure for minimizing an electrostatic discharge(ESD) influence and for removing a signal coupling noise of each sensor pixel. The proposed detection circuit increases the voltage difference between a ridge and valley about $80\%$ more than old circuit. The test chip is composed of $160\;\times\;192$ array sensing cells $(9,913\times11,666\;um^2).$ The sensor plate area is $58\;\times\;58\;um^2$ and the pitch is 60um. The image resolution is 423 dpi. The chip was fabricated on a 0.35um standard CMOS process. It successfully captured a high-quality fingerprint image and performed the registration and identification processing. The sensing and authentication time is 1 sec(.) with the average power consumption of 10 mW at 3.0V. The reveal ESD tolerance is obtained at the value of 4.5 kV.

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Core Circuit Technologies for PN-Diode-Cell PRAM

  • Kang, Hee-Bok;Hong, Suk-Kyoung;Hong, Sung-Joo;Sung, Man-Young;Choi, Bok-Gil;Chung, Jin-Yong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.128-133
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    • 2008
  • Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

Some Chip Budding Techniques for Improving the Nursery Performances in Apple Trees (사과나무의 묘목생산성 향상을 위한 몇 가지 깎기눈접 기술)

  • Lee, Jong-Seob;Yoon, Tae-Myung
    • Horticultural Science & Technology
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    • v.19 no.3
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    • pp.352-357
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    • 2001
  • This experiment was carried out in order to develop some chip budding techniques related to the production of high quality maiden apple trees. Optimum chip budding time for apple trees appeared to be from mid-August to early September. Untying wrapping tapes after 6 8 weeks from budding led to higher graft success and better shoot growth than removing the tapes earlier or later than the 6-8 weeks. Dipping pre-cut bud chips into ordinary water of $25^{\circ}C$ for 5 hours did not hamper the graft-success nor the early season growth of the graft compared with non-treated control. Dipping the pre-cut bud-chips into the $35^{\circ}C$ water for 3 hours or for 5 hours hampered the union formation and shoot growth of the 'Fuji' apple trees.

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Design and Implementation of an Android Application for Protecting the Personal Information on Smart Phones (스마트폰의 개인 정보 보호를 위한 안드로이드용 어플리케이션 설계 및 구현)

  • Lim, Hun-Jin;Choi, Do-Jin;Yoo, Jae-Soo
    • The Journal of the Korea Contents Association
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    • v.20 no.12
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    • pp.266-277
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    • 2020
  • As users' convenience increases, the issue of personal information leakage about smartphones is also becoming serious. Since all of the user's personal information needed to provide functions such as electronic banking services and personal file storage is stored in the smartphone, the user's important personal information may be exposed if the smartphone is lost or stolen. In order to protect this privacy, governments and telecommunications companies offer smartphone locking or initialization services, but there are many loopholes and problems. In this paper, we design and implement applications that prevent malicious use of a user's personal information stored on a smartphone when a smartphone is lost or stolen, and that automatically initializes the smartphone used after removing or altering the USIM chip and destroys the user's personal information stored within the phone. The proposed application prevents users from maliciously using their personal information when a smartphone is lost or stolen.