• Journal of the Korean Society of Industry Convergence
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• v.7 no.4
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• pp.325-330
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• 2004

The forces acting on the tool are an important aspect of maching. For those concerned with the manufacture of machine tools, a knowledge of the forces in needed for estimation of power reguirements and for the design of machine tool elements tool-holders and fixtures, adequately rigid and free from vibration. The force reguired to form the chip is dependent on the shear yield strength of the work material un der cutting conditions which are cutting speed, workpiece, feedrate, insert type. In this study, FG, ML, MP, MC, C, RT inserts were investigated in turning using SM45C, SCM4, SKD11, SUS316, materials. The diameter of materials was 60mm, 80mm, 110mm. This paper presents MP were lowest and SKD11 were largest of the workpiece in cutting forces.

• Journal of the Korean Society for Precision Engineering
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• v.11 no.6
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• pp.179-184
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• 1994

In this study a nondimensional parameter, feed/land length(F/L) was introduced, and using this parameter, cutting performance and chip breaking characteristics of the groove and the land angle type chip formers were assessed. Specific cutting energy consumed and shape of broken chip with its breaking cycle time were appraised to find out the ranges of F/L value where efficient cutting and effective chip breaking could be achieved. C type chip was found out to be the most preferable in terms of cutting efficiency.

• Proceedings of the Korean Powder Metallurgy Institute Conference
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• 2006.09b
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• pp.969-970
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• 2006

In present work, manufacturing technologies of titanium hydride powder were studied for recycling of titanium tuning chip and for this, attrition ball milling was carried out under $H_2$ pressure of 0.5 MPa. Ti chips were completely transformed into $TiH_2$ within several hundred seconds. Dehydrogenation process $TiH_2$ powders is consist of two reactions: one is reaction of $TiH_2$ to $TiH_x$ and the other decomposition of $TiH_x$ to Ti and $H_2$. The former reaction shows relatively low activation energy and it is suggested that the reaction is caused by introduction of defects due to milling.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.888-889
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• 2015

This paper presents a method of constructing the system-on-chip(SoC) based on embedded systems. The proposed method is more compact and effectiveness than former methods. The requirements generation start high level performance simulation and then passes to an executable specification suitable for implementation using a hardware/software co-design tool. The reuse of pre-exiting components is supported, as well as synthesis of the system interface, but only after much work is done to program the hardware/software co-design tool. The actual design flow described allows feedback among all design levels, e.g. from implementation up to requirements, throughout the process. In the future, it is necessary to development the advanced method of constructing system-on-chip based on embedded systems.

• Journal of the Korean Ceramic Society
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• v.29 no.12
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• pp.956-962
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• 1992

The predominant sintering mechanisms of low firing temperature ceramic substrate which consists of borosilicate glass containing alumina as a filler are the rearrangement of alumina particles and the viscous flow of glass powders. In this system, sintering condition depends on the volume ratio of alumina to glass and on the particle size. When the substrate contains about 35 vol% alumina filler and the average alumina particle size is 4 $\mu\textrm{m}$, the best firing condition is obtained at the temperature range of 900∼1000$^{\circ}C$. The extensive rearrangement behavior occurs at these conditions, and the optimum sintering condition is attained by smaller size of glass particles, too. The formation of cristobalite during sintering causes the difference of thermal expansion coefficient between the substrate and Si chip. This phenomenon degradates the capacity of Si chip. Therefore, the crystallization should be prevented. In the alumina filled borosilicate glass system, the crystallization does not occur. This effect may have some relation with aluminum ions in alumina. For aluminum ions diffuse into glass matrix during sintering, functiong as network former.

• Journal of the Korea Society for Simulation
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• v.9 no.2
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• pp.15-25
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• 2000

Since data security problems are very important in the information age, cryptographic algorithms for encryption and decryption have been studied for a long time. The GOST(Gosudarstvennyi Standard or Government Standard) algorithm as a data encryption algorithm with a 256-bit key is a 64-bit block algorithm developed in the former Soviet Union. In this paper, we describe how to design an encryption chip based on the GOST algorithm. In addition, the GOST algorithm is compared with the DES(Data Encryption Standard) algorithm, which has been used as a conventional data encryption algorithm, in modeling techniques and their performance. The GOST algorithm whose key size is relatively longer than that of the DES algorithm has been expanded to get better performance, modeled in VHDL, and simulated for implementation with an CPLD chip.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.481-484
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• 2007

This paper presents a method of constructing the system-on-chip(SoC) based on embedded systems. The proposed method is more compact and effectiveness than former methods. The requirements generation start high level performance simulation and then passes to an executable specification suitable for implementation using a hardware/software co-design tool. The reuse of pre-exiting components is supported, as well as synthesis of the system interface, but only after much work is done to program the hardware/software co-design tool. The actual design flow described allows feedback among all design levels, e.g. from implementation up to requirements, throughout the process. In the future, it is necessary to development the advanced method of constructing system-on-chip based on embedded systems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.4
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• pp.415-425
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• 1997

Although FHSS has many advantages over conventional digital radio communication system, field application has been so far hampered due to its complicated synchronization. In this paper, a new FHSS system is proposed which one FH signal modulated with GMSK and one chip delayed FH signal than former are sent from transmitter, and this is recovered by matching process at a heterodyne correlator in receiver; thus eliminates synchronization as a whole. Through analysis and experiment, we assure that there is possibility in this. The exper- imental result from 915~929 MHz bandwidth with 31 chips is investigated in the environment of AWGN.

• Journal of Internet Computing and Services
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• v.5 no.3
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• pp.45-56
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• 2004

In this paper, we propose ATM switch architecture including ALL type 2 switch which can efficiently transmit low-bit rate data, even if the network has many endpoints. We simulate the architecture of ATM switch fabric that is modeled in computer program and analyze the performance according to offered loads. ATM switch proposed in this paper can support cell switching for all types of m cells which consist of ALL type 1. ALL type 2, ALL type 3/4 and ALL type 5 cells. We propose two switch fabric methods; One supports the ALL type 2 cell processing per input port, the other global ALL type 2 cell processing for every input port. The simulation results show that the latter is superior to the former. But the former has a merit for easy implementation and extensibility. In this paper, the AAL Type 2 switch module which adapts the former method is designed using VHDL language and implemented in FPGA chip. The designed AAL Type 2 switch module operates at 52MHz. The proposed ATM switch fabric is widely applicable to mobile communication, narrow band services over ATM network and wireless ATM as well as general ATM switching fabric.

• Journal of Sensor Science and Technology
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• v.23 no.6
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• pp.392-396
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• 2014

The 2-dimensional silicon vertical Hall devices, which are sensitive to X,Y components of the magnetic field parallel to the surface of the chip, are fabricated using a modified bipolar process. It consists of the thin p-layer at Si-$SiO_2$ interface and n-epi layer to improve the sensitivity and influence of interface effect. Experimental samples are a sensor type K with and type J without $p^+$ isolation dam adjacent to the center current electrode. The results for both type show a more high sensitivity than the former's 2-dimensional vertical Hall devices and a good linearity. The measured non-linearity is about 0.8%. The sensitivity of type J and type K are about 66 V/AT and 200 V/AT, respectively. This sensor's behavior can be explained by the similar J-FET model.