• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제50권4호
• /
• pp.176-181
• /
• 2001

As the data rate between chip-to-chip gets high, the skin effect and load of pins deteriorate noise margin. With these, noise disturbances on the bus channel make it difficult for receiver circuits to read the data signal. This paper has proposed a new pre-emphasis driver circuit which achieves wide noise margin by enlarging the signal voltage range during data transition. When data is transferred from a memory chip to a controller, the output boltage of the driver circuit reaches the final values through the intermediate voltage level. The proposed driver supplies more currents applicable to a packet-based memory system, because it needs no additional control signal and realizes very small area. The circuit has been designed in a 0.18 ${\mu}m$ CMOS process, and HSPICE simulation results have shown that the data rate of 1.32 Gbps be achieved. Due to its result, the proposed driver can achieved higher speed than conventional driver by 10%.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제53권5호
• /
• pp.286-292
• /
• 2004

In this study, an integrated microelectrode array was fabricated on glass slide using microfabrication technology. Probe DNAs consisting of mercaptohexyl moiety at their 5-end were spotted on the gold electrode using micropipette or DNA arrayer utilizing the affinity between gold and sulfur. Cyclic voltammetry in 5mM ferricyanide/ferrocyanide solution at 100 ㎷/s confirmed the immobilization of probe DNA on the gold electrodes. When several DNAs were detected electrochemically, there was a difference between target DNA and control DNA in the anodic peak current values. It was derived from specific binding of Hoechst 33258 to the double stranded DNA due to hybridization of target DNA. It suggested that this DNA chip could recognize the sequence specific genes. It suggested that multichannel electrochemical DNA microarray is useful to develop a portable device for clinical gene diagnostic System.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
• /
• pp.372-373
• /
• 2006

In this paper, a DNA chip with a microelectrode array was fabricated using microfabrication technology. Several probe DNAs consisting of mercaptohexyl moiety at their 5 end were immobilized on the gold electrodes by DNA arrayer. Then target DNAs were hybridized and reacted with Hoechst 33258, which is a DNA minor groove binder and electrochemically active dye. Linear sweep voltammetry or cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. It was derived from Hoechst 33258 concentrated at the electrode surface through association with formed hybrid. It suggested that this DNA chip could recognize the sequence specific genes.

• 한국화재소방학회논문지
• /
• 제10권2호
• /
• pp.28-39
• /
• 1996

A recently developed electro-thermal simulation methodology is used to analyze the behavior of a PWM(Pulse-Width-Modulated) voltage source inverter which uses IGBT(Insulated Gate Bipolar Transistor) as the switching devices. In the electro-thermal network simulation methdology, the simulator solves for the temperature distribution within the power semiconductor devices(IGBT electro-thermal model), control logic circuitry, the IGBT gate drivers, the thermal network component models for the power silicon chips, package, and heat sinks as well as the current and voltage within the electrical network. The thermal network describes the flow of heat form the chip surface through the package and heat sink and thus determines the evolution of the chip surface temperature used by the power semiconductor device models. The thermal component model for the device silicon chip, packages, and heat sink are developed by discretizing the nonlinear heat diffusion equation and are represented in component from so that the thermal component models for various package and heat sink can be readily connected to on another to form the thermal network.

• Design & Manufacturing
• /
• 제13권4호
• /
• pp.10-16
• /
• 2019

Semiconductor chip is bonded to the substrate by melting solder bumps. In general, the chip bonding is applied by a Reflow process or a Thermo-Compression(TC) bonding process. In this paper, we introduce a Laser Assisted Thermo-Compression bonding (LATCB) process to improve the anxiety of the existing process(Reflow, TC bonding). In the LATCB process, the chip is bonded to the substrate by irradiating a laser with a uniform energy density in the same area as the chip to melt only the solder bumps and press the chip with a Transparent Compression Module (TCM). The TCM consists of a fused silica header for penetrating the laser and pressurizing the chip, and a piezoelectric actuator (P.A.) coupled to both ends of the header for micro displacement control of the header. In addition, TCM is a structure that can pressurize the chip and deliver it to the chip and solder bumps without losing the energy of the laser. Fused silica, which is brittle, is vulnerable to deformation, so the header may be damaged when an external force is applied for pressurization or a displacement differenced is caused by piezoelectric actuators at both ends. On the other hand, in order to avoid interference between the header and the adjacent chip when pressing the chip using the TCM, the header has a notch at the bottom, and breakage due to stress concentration of the notch is expected. In this study, the thickness and notch length that the header does not break when the external force (500 N) is applied to both ends of the header are optimized using structural analysis and Coulomb-Mohr failure theory. In addition, the maximum displacement difference of the P.A.s at both ends where no break occurred in the header was derived. As a result, the thickness of the header is 11 mm, and the maximum displacement difference between both ends is 8 um.

• 한국정보통신학회논문지
• /
• 제13권2호
• /
• pp.431-436
• /
• 2009

홈 네트워크 분야는 최근에 급격히 발달하고 있는 분야로서 그 성장 범위를 점차 확대해 나가고 있으며, 홈 네트 워크 분야의 기술 발달은 가전기기와 주변기기의 제어 및 관리를 위한 홈 네트워크 관리 기술의 발전을 가져오고 있다. 이러한 홈 네트워크의 구현은 기술의 발달에 따라 그 기능 또한 점점 복잡하고 다양한 프로세서의 처리를 필요로 하는 경향이 두드러지고 있다. 홈 네트워크 시스템은 여러 가지 요소에 의해 영향을 받기 때문에 시스템의 설계 상당히 중요한 과정에 해당된다. 이에 본 논문에서는 임베디드 개발 장비, STR710F Chip, CC2420 RF Module-Chip을 이용 소형화된 모듈을 설계하고 확장성을 고려하여 RS232C와 USB를 인터페이스로 한 홈 네트워크 시스템 모듈을 설계하였다.

• 융합신호처리학회논문지
• /
• 제10권2호
• /
• pp.120-126
• /
• 2009

반도체 외관결함에는 발생 요인이 각각 다른 crack, foreign material, chip-out, chip, void 등이 있으며, 검사 시스템에서는 결함 유무 및 결함 분류를 수행하여 효과적인 공정관리가 가능하여야 한다. 본 논문에서는 QFN 패키지 결함의 분류를 위한 알고리즘 및 광학시스템을 제안한다. 제안한 방법에서 분류가 어려운 결함 중 하나인 foreign material 과 chip의 효과적인 분류를 위해 제안한 결함의 위치, 밝기의 특징정보(feature)를 사용한 ML(Maximum Likelihood ratio) 분류방법 및 특징정보 획득에 효과적인 광학계를 제안하였다. 실험 결과에서 분류가 어려운 foreign material과 chip에 대한 신뢰성 높은 분류성능을 보였다.

• Nuclear Engineering and Technology
• /
• 제53권10호
• /
• pp.3327-3334
• /
• 2021

Present electric grids are advanced to integrate smart grids, distributed resources, high-speed sensing and control, and other advanced metering technologies. Cybersecurity is one of the challenges of the smart grid and nuclear plant digital system. It affects the advanced metering infrastructure (AMI), for grid data communication and controls the information in real-time. The research article is emphasized solving the nuclear and smart grid hardware security issues with the integration of field programmable gate array (FPGA), and implementing the latest Time Authenticated Cryptographic Identity Transmission (TACIT) cryptographic algorithm in the chip. The cryptographic-based encryption and decryption approach can be used for a smart grid distribution system embedding with FPGA hardware. The chip design is carried in Xilinx ISE 14.7 and synthesized on Virtex-5 FPGA hardware. The state of the art of work is that the algorithm is implemented on FPGA hardware that provides the scalable design with different key sizes, and its integration enhances the grid hardware security and switching. It has been reported by similar state-of-the-art approaches, that the algorithm was limited in software, not implemented in a hardware chip. The main finding of the research work is that the design predicts the utilization of hardware parameters such as slices, LUTs, flip-flops, memory, input/output blocks, and timing information for Virtex-5 FPGA synthesis before the chip fabrication. The information is extracted for 8-bit to 128-bit key and grid data with initial parameters. TACIT security chip supports 400 MHz frequency for 128-bit key. The research work is an effort to provide the solution for the industries working towards embedded hardware security for the smart grid, power plants, and nuclear applications.

• 생물환경조절학회지
• /
• 제31권3호
• /
• pp.163-169
• /
• 2022

본 연구는 딸기재배시 전용 고설베드를 사용하지 않고, 일반 수경재배 시설을 이용하여 코이어 배지를 베드에 올려 재배하는 방법을 구명하기 위해서 실시하였다. 토마토나 파프리카를 재배하는 시설재배 베드에 코이어의 칩과 더스트 비율이 5:5인 코이어 배지 1겹처리(높이 10cm; A), 2겹으로 쌓은 처리(높이 20cm; B), 코이어의 칩과 더스트 비율이 7:3인 코이어 배지 1겹처리(높이 15cm; C)와 대조구로는 딸기 전용 플라스틱 화분(Control) 처리구로 하였다. 생육특성은 코이어 배지 높이별로는 유의성이 없었고, 플라스틱 화분에서 재배한 것이 작은 경향을 보였다. 딸기 잎의 광합성율은 처리별로 14.68-15.76µmol CO₂·m^-2·s^-1로 통계적인 유의성은 없었고, 뿌리의 근활력은 배지 용량이 컸던 C와 B 처리구가 A 처리구와 대조구보다는 높은 것으로 나타났다. 과장과 과폭은 각각4.04-4.13cm와 3.26-3.34cm로 통계적인 유의성이 없었고, 과장과 과폭 비율은 대조구가 1.27로 A-C 처리구의 1.23-1.24보다 뾰쪽한 형태이었다. 딸기 1주당 수확과수는 C 처리구가 4.4개로 가장 적었고, 대조구, A, B 처리구의 6.2-6.5개로 처리간 유의성은 없었다. 상품수량 과수는 A 처리구가 74개로 가장 많았고, C 처리구가 53개로 가장 적었으며, 1주당 수량은 A 처리구가 72.38g으로 가장 컸고, C 처리구가 48.69g으로 가장 작았다. 이와 같은 결과는 딸기재배 시 전용재배 시설을 설치하지 않고, 기존의 토마토나 파프리카 수경재배 시설에서 코이어 배지를 활용하여 딸기재배를 할 수 있다는 것을 나타낸다. 다만 C 처리구에서 수량이 감소한 것은 칩과 더스트 비율이 7:3으로, A와 B 처리구의 칩과 더스트 비율이 5:5와 다른 것이 원인으로 추정되며 칩과 더스트 비율에 따른 추가 연구가 필요하다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2001년도 추계학술대회 논문집 전기물성,응용부문
• /
• pp.274-276
• /
• 2001

This research aims to develop the multiple channel electrochemical DNA chip using microfabrication technology. At first, we fabricated a high integration type DNA chip array by lithography technology. Several probe DNAs consisting of thiol group at their 5-end were immobilized on the sold electrodes. Then target DNAs were hybridized and reacted. Cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. Therefore, it is able to detect a plural genes electrochemically after immobilization of a plural probe DNA and hybridization of non-labeling target DNA on the electrodes simultaneously. It suggested that this DNA chip could recognize the sequence specific genes.