• 한국재료학회지
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• 제22권9호
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• pp.454-458
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• 2012

Various adhesive materials are used in flip chip packaging for electrical interconnection and structural reinforcement. In cases of COF(chip on film) packages, low temperature bonding adhesive is currently needed for the utilization of low thermal resistance substrate films, such as PEN(polyethylene naphthalate) and PET(polyethylene terephthalate). In this study, the effects of anhydride and dihydrazide hardeners on the low-temperature snap cure behavior of epoxy based non-conductive pastes(NCPs) were investigated to reduce flip chip bonding temperature. Dynamic DSC(differential scanning calorimetry) and isothermal DEA(dielectric analysis) results showed that the curing rate of MHHPA(hexahydro-4-methylphthalic anhydride) at $160^{\circ}C$ was faster than that of ADH(adipic dihydrazide) when considering the onset and peak curing temperatures. In a die shear test performed after flip chip bonding, however, ADH-containing formulations indicated faster trends in reaching saturated bond strength values due to the post curing effect. More enhanced HAST(highly accelerated stress test) reliability could be achieved in an assembly having a higher initial bond strength and, thus, MHHPA is considered to be a more effective hardener than ADH for low temperature snap cure NCPs.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권3호
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• pp.133-139
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• 2007

Future MEMS systems will be composed of larger varieties of devices with very different functionality such as electronics, mechanics, optics and bio-chemistry. Integration technology of heterogeneous devices must be developed. This article first deals with the current development trend of new fabrication technologies; those include self-assembling of parts over a large area, wafer-scale encapsulation by wafer-bonding, nano imprinting, and roll-to-roll printing. In the latter half of the article, the concept towards the heterogeneous integration of devices and functionality into micro/nano systems is described. The key idea is to combine the conventional top-down technologies and the novel bottom-up technologies for building nano systems. A simple example is the carbon nano tube interconnection that is grown in the via-hole of a VLSI chip. In the laboratory level, the position-specific self-assembly of nano parts on a DNA template was demonstrated through hybridization of probe DNA segments attached to the parts. Also, bio molecular motors were incorporated in a micro fluidic system and utilized as a nano actuator for transporting objects in the channel.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.2398-2400
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• 2005

In this paper, we have been described a new constructing method of multichannel biosensor using self-assembly by magnetic force interaction. A metal particle and an array was fabricated by photolithographic. Biomaterials were immobilized on the metal particle. The array and the particles were mixed in a buffer solution, and were arranged by magnetic force interaction and self-assembly. A quarter of total Ni dots were covered by the particles. The binding direction of the particles was controllable, and condition of particles was almost with Au surface on top. The particles were successfully arranged on the array. The biomaterial activities were detected by chemiluminescence.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1317-1318
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• 2006

In this paper, we have been described a new constructing method of multichannel biosensor using self-assembly by magnetic force interaction. A metal particle and an array was fabricated by photolithographic. Biomaterials were immobilized on the metal particle. The array and the particles were mixed in a buffer solution, and were arranged by magnetic force interaction and self-assembly. A quarter of total Ni dots were covered by the particles. The binding direction of the particles was controllable, and condition of particles was almost with Au surface on top. The particles were successfully arranged on the array. The biomaterial activities were detected by chemiluminescence.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 추계학술발표대회
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• pp.9-9
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• 2011

The transfer of nano-science accomplishments into technology is severely hindered by a lack of understanding of barriers to nanoscale manufacturing. The NSF Center for High-rate Nanomanufacturing (CHN) is developing tools and processes to conduct fast massive directed assembly of nanoscale elements by controlling the forces required to assemble, detach, and transfer nanoelements at high rates and over large areas. The center has developed templates with nanofeatures to direct the assembly of carbon nanotubes and nanoparticles (down to 10 nm) into nanoscale trenches in a short time (in seconds) and over a large area (measured in inches). The center has demonstrated that nanotemplates can be used to pattern conducting polymers and that the patterned polymer can be transferred onto a second polymer substrate. Recently, a fast and highly scalable process for fabricating interconnects from CMOS and other types of interconnects has been developed using metallic nanoparticles. The particles are precisely assembled into the vias from the suspension and then fused in a room temperature process creating nanoscale interconnect. The center has many applications where the technology has been demonstrated. For example, the nonvolatile memory switches using (SWNTs) or molecules assembled on a wafer level. A new biosensor chip (0.02 $mm^2$) capable of detecting multiple biomarkers simultaneously and can be in vitro and in vivo with a detection limit that's 200 times lower than current technology. The center has developed the fundamental science and engineering platform necessary to manufacture a wide array of applications ranging from electronics, energy, and materials to biotechnology.

• 마이크로전자및패키징학회지
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• 제19권4호
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• pp.45-50
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• 2012

A family of multi-die DRAM packages was developed that incorporate the full functionality of an SODIMM into a single package. Using a common ball assignment analogous to the edge connector of an SODIMM, a broad range of memory types and assembly structures are supported in this new package. In particular DDR3U, LPDDR3 and DDR4RS are all supported. The center-bonded DRAM use face-down wirebond assembly, while the peripherybonded LPDDR3 use the face-up configuration. Flip chip assembly as well as TSV stacked memory is also supported in this new technology. For the center-bonded devices (DDR3, DDR4 and LPDDR3 ${\times}16$ die) and for the face up wirebonded ${\times}32$ LPDDR3 devices, a simple manufacturing flow is used: all die are placed on the strip in a single machine insertion and are sourced from a single wafer. Wirebonding is also a single insertion operation: all die on a strip are wirebonded at the same time. Because the locations of the power signals is unchanged for these different types of memories, a single consolidated set of test hardware can be used for testing and burn-in for all three memory types.

• 한국전자파학회지:전자파기술
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• 제24권2호
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• pp.51-57
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• 2013

The current expanding mobile markets incessantly demands small form factor, low power consumption and high aggregate throughput for silicon-level integration such as memory to logic system. One of emerging solution for meeting this high market demand is 3D through silicon stacking (TSS) technology. Main challenges to bring 3D TSS technology to the volume production level are establishing a cost effective supply chain and building a reliable manufacturing processes. In addition, this technology inherently help increase number of IOs and shorten interconnect length. With those benefits, however, potential signal and power integrity risks are also elevated; increase in PDN inductance, channel loss on substrate, crosstalk and parasitic capacitance. This paper will report recent progress of wide IO memory to high count TSV logic device assembly development work. 28 nm node TSV test vehicles were fabricated by the foundry and assembled. Successful integration of memory wide IO chip with less than a millimeter package thickness form factor was achieved. For this successful integration, we discussed potential signal and power integrity challenges. This report demonstrated functional wide IO memory to 28 nm logic device assembly using 3D package architecture with such a thin form factor.

• 천문학논총
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• 제18권1호
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• pp.69-74
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• 2003

A CCD camera for the BOES (Bohyunsan Observatory Echelle Spectrograph) has been developed. The camera consists of a 2048 ${\times}$ 4096 format CCD, a SDSU Gen-I CCD controller, and a continuous flow cryostat (CFC) designed by the ESO. In order to control the CCD under SDSU Gen-I controller, the voltage level of all the biases and clocks were lowered by -6V. The CFC showed cooling time of about 10 hour, after which the chip temperature settled down with variation less than ${\pm}1^{\circ}C$. The final chip temperature is around -105$^{\circ}C$ with the setting value for the CFC as -170$^{\circ}C$.

• 대한기계학회논문집B
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• 제26권5호
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• pp.716-723
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• 2002

Heat transfer in linear motor driven stages for surface mounting device applications was investigated. A simple one-dimensional thermal resistance model (TRM) was introduced. In order to reduce three-dimensional nature to one-dimensional, a few assumptions and simplifications were employed suitably. A good agreement with a finite element heat transfer analysis in temperature profile was obtained. For validation, the analysis was compared with the measurement with respect to motor driving power. Overall discrepancy was less than 7$^{\circ}C$. The influence of two high thermal resistance parts, insulation sheet and thermal contact between the coil assembly and the mounting plate, was examined through the analysis. Additionally, the thermal resistance analysis was applied to another stage including an internal cooling-air passage, and was found available for this system as well. After validation, the cooling effect was surveyed in terms of motor power, and cooling-air and -water flow rate.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2001년도 추계학술대회논문집B
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• pp.96-101
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• 2001

Heat transfer in linear motor driven stages for surface mounting device applications was investigated. A simple one-dimensional thermal resistance model was introduced. In order to reduce three-dimensional nature to one-dimensional, a few assumptions and simplifications were employed suitably. A good agreement with a finite element heat transfer analysis in temperature profile was obtained. For validation, the analysis was compared with the measurement with respect to motor driving power. Overall discrepancy was less than $7^{\circ}C$. The influence of two high thermal resistance parts, insulation sheet and thermal contact between the coil assembly and the mounting plate, was examined through the analysis. Additionally, the thermal resistance analysis was applied to another stage including an internal cooling-air passage, and was found available for this system as well. After validation, the cooling effect was surveyed in terms of motor power, and cooling-air flow rate.