• 마이크로전자및패키징학회지
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• 제18권1호
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• pp.41-47
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• 2011

Currently, there is widespread adoption of silicon-based technologies for the implementation of radio frequency (RF) integrated passive devices (IPDs) because of their low-cost, small footprint and high performance. Also, the need for high speed data transmission and reception coupled with the ever increasing demand for mobility in consumer devices has generated a great interest in low cost devices with smaller form-factors. The UWB BPF makes use of lumped IPD technology on a silicon substrate CSMP (Chip Scale Module Package). In this paper, this filter shows 2.0 dB insertion loss and 15 dB return loss from 7.0 GHz to 9.0 GHz. To the best of our knowledge, the UWB band-pass-filter developed in this paper has the smallest size ($1.4\;mm{\times}1.2\;mm{\times}0.40\;mm$) while achieving equivalent electrical performance.

• 한국생산제조학회지
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• 제24권4호
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• pp.448-454
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• 2015

In this paper, the band structural design that is typically in a line was arranged in a ring shape, so as to configure the high power LED lighting in such a way as to form a concentrated light distribution angle of less than 15 degrees. The parabolic aluminized reflector PAR38 that facilitates design using area and the area of the optical system to the same extent, applied a multiple light-source condenser lens optical system for the control of integration. The LED used here implemented a single linear light source using ans LED module with ans LED, flip-chip chip-scale package. The optical system was designed based on the energy star standard.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.189-195
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• 2004

A 10 Gb/s limiting amplifier IC with the emitter area of $1.5{\times}10{\mu}m^2$ for optical transmission system was designed and fabricated with a AIGaAs/GaAs HBTs technology. In this stud)', we evaluated fine pitch bump using WL-CSP (Wafer Level-Chip Scale Packaging) instead of conventional wire bonding for interconnection. For this we developed WL-CSP process and formed fine pitch solder bump with the $40{\mu}m$ diameter and $100{\mu}m$ pitch on bonding pad. To study the effect of WL-CSP, electrical performance was measured and analyzed in wafer and package module using WL-CSP. In a package module, clear and wide eye diagram openings were observed and the riselfall times were about 100ps, and the output" oltage swing was limited to $600mV_{p-p}$ with input voltage ranging from 50 to 500m V. The Small signal gains in wafer and package module were 15.56dB and 14.99dB respectively. It was found that the difference of small signal gain in wafer and package module was less then 0.57dB up to 10GHz and the characteristics of return loss was improved by 5dB in package module. This is due to the short interconnection length by WL-CSP. So, WL-CSP process can be used for millimeter wave GaAs MMIC with the fine pitch pad.

• 한국전자파학회논문지
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• 제15권5호
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• pp.509-516
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• 2004

Cu 및 BCB 공정을 사용하여 고성능 RF 수동회로를 실리콘 기판 상에 구현하는 RF 수동 집적회로 공정을 개발하였다. 이러한 기술은 개별 수동소자를 통한 모듈 구현방식보다 훨씬 작고 저렴하며 우수한 성능의 RF모듈을 구현할 수 있게 하였다. 개발된 실리콘 수동 집적회로 공정으로 제작된 내경 225 um, 회전수 2.5의 인덕터는 2.7 nH의 인덕턴스를 가지며 1 ㎓ 이상에서 30 이상의 품질계수를 가지는 것으로 측정되었다. 또한 개발된 인덕터를 사용하여 WLCSP(Wafer Level Chip Scale Package) 형태의 수동회로를 제작하였다. 제작된 저역 여파기는 2차 고조파 억제를 위해 인덕터 내경 안에 병렬공진용 커패시터를 삽입하였고 2.45 ㎓에서 0.5 ㏈ 이하의 삽입손실을 보였다. 그리고 고역 여파기와 저역 여파기 구조를 가지는 발룬 회로는 2.45 ㎓에서 0.5 ㏈ 이하의 삽입손실과 182도의 출력 단자간 위상 차이를 보여주었다.