• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.4
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• pp.338-347
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• 2021

In this paper, the beta-ray sensor circuit used in the true random number generator was designed using DB HiTek's 0.18㎛ CMOS process. The CSA circuit proposed a circuit having a function of selecting a PMOS feedback resistor and an NMOS feedback resistor, and a function of selecting a feedback capacitor of 50fF and 100fF. And for the pulse shaper circuit, a CR-RC2 pulse shaper circuit using a non-inverting amplifier was used. Since the OPAMP circuit used in this paper uses single power instead of dual power, we proposed a circuit in which the resistor of the CR circuit and one node of the capacitor of the RC circuit are connected to VCOM instead of GND. And since the output signal of the pulse shaper does not increase monotonically, even if the output signal of the comparator circuit generates multiple consecutive pulses, the monostable multivibrator circuit is used to prevent signal distortion. In addition, the CSA input terminal, VIN, and the beta-ray sensor output terminal are placed on the top and bottom of the silicon chip to reduce capacitive coupling noise between PCB traces.

• Journal of the Korea Society of Computer and Information
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• v.14 no.2
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• pp.157-168
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• 2009

In this paper, a photovoltaic system is designed with a step up chopper and single phase PWM(Pulse Width Modulation) voltage source inverter. Where proposed Synchronous signal and control signal was processed by one-chip microprocessor for stable modulation. The step up chopper operates in continuous mode by adjusting the duty ratio so that the photovoltaic system tracks the maximum power point of solar cell without any influence on the variation of insolation and temperature because solar cell has typical voltage and current dropping character. The single phase PWM voltage source the inverter using inverter consists of complex type of electric power converter to compensate for the defect, that is, solar cell cannot be developed continuously by connecting with the source of electric power for ordinary use. It can cause the effect of saving electric power. from 10 to 20[%]. The single phase PWM voltage source inverter operates in situation that its output voltage is in same phase with the utility voltage. In order to enhance the efficiency of photovoltaic cells, photovoltaic positioning system using sensor and microprocessor was design so that the fixed type of photovoltaic cells and photovoltaic positioning system were compared. In result, photovoltaic positioning system can improved 5% than fixed type of photovoltaic cells. In addition, I connected extra power to the system through operating the system voltage and inverter power in a synchronized way by extracting the system voltage so that the phase of the system and the phase of single-phase inverter of PWM voltage type can be synchronized. And, It controlled in order to provide stable pier to the load and the system through maintaining high lurer factor and low output power of harmonics.

• Smart Media Journal
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• v.11 no.9
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• pp.21-29
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• 2022

Ultra Violet(UV) is gradually being replaced with LED instead of general UV lamps. However, the light efficiency of UV LED is still lower than that of the general lamp, and the light efficiency is also low. Due to the current environment and technical problems of UV lamps, the LED replacements are gradually being made. In this study, a new package design and analysis were performed to increase the lifetime and performance of UV LEDs. A new packaging for UV LED were designed and implemented. The new packaging for UV LED was constructed to improve light efficiency. And the electrical and optical characteristics were analyzed respectively. To improve the optical efficiency in UV LED package, the Al has been used based on high reflectivity and applying the optimal lens focusing. Compared to the existing silver Ag, the light efficiency was improved by about 30% or more, and it was confirmed that the light output degradation characteristic was improved by about 10% in the newly applied optical device chip.

• Journal of the Korea Society of Computer and Information
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• v.16 no.7
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• pp.1-11
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• 2011

Many researchers have studied on the methods to improve the processor performance. However, high integrated semiconductor technology for improving the processor performance causes many problems such as battery life, high power density, hotspot, etc. Especially, as hotspot has critical impact on the reliability of chip, thermal problems should be considered together with performance and power consumption when designing high-performance processors. To alleviate the thermal problems of processors, there have been various researches. In the past, mechanical cooling methods have been used to control the temperature of processors. However, up-to-date microprocessors causes severe thermal problems, resulting in increased cooling cost. Therefore, recent studies have focused on architecture-level thermal-aware design techniques than mechanical cooling methods. Even though architecture-level thermal-aware design techniques are efficient for reducing the temperature of processors, they cause performance degradation inevitably. Therefore, if the mechanical cooling methods can manage the thermal problems of processors efficiently, the performance can be improved by reducing the performance degradation due to architecture-level thermal-aware design techniques such as dynamic thermal management. In this paper, we analyze the cooling efficiency of high-performance multicore processors according to mechanical cooling methods. According to our experiments using air cooler and liquid cooler, the liquid cooler consumes more power than the air cooler whereas it reduces the temperature more efficiently. Especially, the cost for reducing $1^{\circ}C$ is varied by the environments. Therefore, if the mechanical cooling methods can be used appropriately, the temperature of high-performance processors can be managed more efficiently.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1210-1230
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• 1997

In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.

• Clean Technology
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• v.29 no.4
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• pp.255-261
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• 2023

Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.