• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.18 no.2
• /
• pp.75-84
• /
• 2008

Recently, the straightforward CRT-RSA was shown to be broken by fault attacks through many experimental results. In this paper, we analyze the fault attacks against CRT-RSA and their countermeasures, and then propose a new fault infective method resistant to the various fault attacks on CRT-RSA. In our CRT-RSA algorithm, if an error is injected in exponentiation with modulo p or q, then the error is spreaded by fault infective computation in CRT recombination operation. Our countermeasure doesn't have extra error detection procedure based on decision tests and doesn't use public parameter such as e. Also, the computational cost is effective compared to the previous secure countermeasures.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.19 no.3
• /
• pp.51-59
• /
• 2009

The CRT-RSA cryptosystem is very vulnerable to fault insertion attacks in which an attacker can extract the secret prime factors p, q of modulus N by inserting an error during the computational operation on the cryptographic chip. In this paper, after implementing the CRT-RSA cryptosystem, we try to extract the secret key embedded in commercial microcontroller using optical injection tools such as laser beam or camera flash. As a result, we make sure that the commercial microcontroller is very vulnerable to fault insertion attacks using laser beam and camera flash, and can apply the prime factorization attack on CRT-RSA Cryptosystem.

• The Journal of Information Technology
• /
• v.5 no.4
• /
• pp.145-154
• /
• 2002

The Extension of Base is a fundamental Method to expend the moduli in RNS(Residue Number System). RNS has the benefit of parallelism and no carry propagation at each moduli, but division , extension of base and etc. is the problem of RNS in case of the operation speed.Generally this method is applied to system using Mixed Radix Conversion. it appears to decrease the size of Arithmetic Unit, but increasing the time of operation. So in this paper, the Improved Extension of Base is proposed using Chinese Remainder Theorem. it has the comparative small size and Improved speed.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.20 no.2
• /
• pp.33-41
• /
• 2010

Many experimental results shows that RSA-CRT algorithm can be broken by fault analysis attacks. We analyzed the previous fault attacks and their countermeasures on RSA-CRT algorithm and found an weakness of the countermeasure proposed by Abid and Wang. Based on these analyses, we propose a new countermeasure which uses both double exponentiation and fault infective computation method. The proposed method efficiently computes a fault verification information using double exponentiation. And, it is designed to resist simple power analysis attack and (N-1) attack.

• Journal of Communications and Networks
• /
• v.13 no.5
• /
• pp.449-455
• /
• 2011

Inspired by fast Jacket transforms, we propose simple factorization and construction algorithms for the M-dimensional discrete Fourier transform (DFT) matrices underlying generalized Chinese remainder theorem (CRT) index mappings. Based on successive coprime-order DFT matrices with respect to the CRT with recursive relations, the proposed algorithms are presented with simplicity and clarity on the basis of the yielded sparse matrices. The results indicate that our algorithms compare favorably with the direct-computation approach.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.12 no.2
• /
• pp.21-34
• /
• 2002

In this paper we propos a new hardware architecture of modular exponentiation using a division chain method which has been proposed in (2). Modular exponentiation using the division chain is performed by receding an exponent E as a mixed form of multiplication and addition with divisors d=2 or $d=2^I +1$ and respective remainders r. This calculates the modular exponentiation in about $1.4log_2$E multiplications on average which is much less iterations than $2log_2$E of conventional Binary Method. We designed a linear systolic array multiplier with pipelining and used a horizontal projection on its data dependence graph. So, for k-bit key, two k-bit data frames can be inputted simultaneously and two modular multipliers, each consisting of k/2+3 PE(Processing Element)s, can operate in parallel to accomplish 100% throughput. We propose a new encoding scheme to represent divisors and remainders of the division chain to keep regularity of the data path. When it is synthesized to ASIC using Samsung 0.5 um CMOS standard cell library, the critical path delay is 4.24ns, and resulting performance is estimated to be abort 140 Kbps for a 1024-bit data frame at 200Mhz clock In decryption process, the speed can be enhanced to 560kbps by using CRT(Chinese Remainder Theorem). Futhermore, to satisfy real time requirements we can choose small public exponent E, such as 3,17 or $2^{16} +1$, in encryption and verification process. in which case the performance can reach 7.3Mbps.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.15 no.12
• /
• pp.4508-4530
• /
• 2021

Today distributed data storage service are being widely used. However lack of proper means of security makes the user data vulnerable. In this work, we propose a Randomized Block Size (RBS) model for secure data storage in distributed environments. The model work with multifold block sizes encrypted with the Chinese Remainder Theorem-based RSA (C-RSA) technique for end-to-end security of multimedia data. The proposed RBS model has a key generation phase (KGP) for constructing asymmetric keys, and a rand generation phase (RGP) for applying optimal asymmetric encryption padding (OAEP) to the original message. The experimental results obtained with text and image files show that the post encryption file size is not much affected, and data is efficiently encrypted while storing at the distributed storage server (DSS). The parameters such as ciphertext size, encryption time, and throughput have been considered for performance evaluation, whereas statistical analysis like similarity measurement, correlation coefficient, histogram, and entropy analysis uses to check image pixels deviation. The number of pixels change rate (NPCR) and unified averaged changed intensity (UACI) were used to check the strength of the proposed encryption technique. The proposed model is robust with high resilience against eavesdropping, insider attack, and chosen-plaintext attack.

• The Journal of the Korea Contents Association
• /
• v.13 no.12
• /
• pp.9-18
• /
• 2013

In recent years, the demands of multimedia data in wireless sensor networks have been significantly increased for the high-quality environment monitoring applications that utilize sensor nodes to collect multimedia data. However, since the amount of multimedia data is very large, the network lifetime and network performance are significantly reduced due to excessive energy consumption on particular nodes. In this paper, we propose an energy-efficient dynamic area compression scheme in wireless multimedia sensor networks. The proposed scheme minimizes the energy consumption in the huge multimedia data transmission process by compression using the Chinese Remainder Theorem(CRT) and dynamic area detection and division algorithm. Our experimental results show that our proposed scheme improves the data compression ratio by about 37% and reduces the amount of transmitted data by about 56% over the existing scheme on average. In addition, the proposed scheme increases network lifetime by about 14% over the existing scheme on average.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.17 no.6
• /
• pp.29-39
• /
• 2007

RSA is one of the most popular public-key crypto-system in various applications. This paper addresses a high-speed RSA crypto-processor with modified radix-4 modular multiplication algorithm and Chinese Remainder Theorem(CRT) using Carry Save Adder(CSA). Our design takes 0.84M clock cycles for a 1024-bit modular exponentiation and 0.25M cycles for a 512-bit exponentiations. With 0.18um standard cell library, the processor achieves 365Kbps for a 1024-bit exponentiation and 1,233Kbps for two 512-bit exponentiations at a 300MHz clock rate.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.37A no.12
• /
• pp.1031-1037
• /
• 2012

We study an algorithm that can efficiently find square roots and cube roots by modifying Tonelli-Shanks algorithm, which has an application in Number Field Sieve (NFS). The Number Field Sieve, the fastest known factoring algorithm, is a powerful tool for factoring very large integer. NFS first chooses two polynomials having common root modulo N, and it consists of the following four major steps; 1. Polynomial Selection 2. Sieving 3. Matrix 4. Square Root. The last step of NFS needs the process of square root computation in Number Field, which can be computed via square root algorithm over finite field.