• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.221-221
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• 2014

The present work proposes an improved numerical simulator for design and modification of large area capacitively coupled plasma (CCP) processing chamber. CCP, as notoriously well-known, demands the tremendously huge computational cost for carrying out transient analyses in realistic multi-dimensional models, because electron dissociations take place in a much smaller time scale (${\Delta}t{\approx}10-8{\sim}10-10$) than time scale of those happened between neutrals (${\Delta}t{\approx}10-1{\sim}10-3$), due to the rf drive frequencies of external electric field. And also, for spatial discretization of electron flux (Je), exponential scheme such as Scharfetter-Gummel method needs to be used in order to alleviate the numerical stiffness and resolve exponential change of spatial distribution of electron temperature (Te) and electron number density (Ne) in the vicinity of electrodes. Due to such computational intractability, it is prohibited to simulate CCP deposition in a three-dimension within acceptable calculation runtimes (<24 h). Under the situation where process conditions require thickness non-uniformity below 5%, however, detailed flow features of reactive gases induced from three-dimensional geometric effects such as gas distribution through the perforated plates (showerhead) should be considered. Without considering plasma chemistry, we therefore simulated flow, temperature and species fields in three-dimensional geometry first, and then, based on that data, boundary conditions of two-dimensional plasma discharge model are set. In the particular case of SiH4-NH3-N2-He CCP discharge to produce deposition of SiNxHy thin film, a cylindrical showerhead electrode reactor was studied by numerical modeling of mass, momentum and energy transports for charged particles in an axi-symmetric geometry. By solving transport equations of electron and radicals simultaneously, we observed that the way how source gases are consumed in the non-isothermal flow field and such consequences on active species production were outlined as playing the leading parts in the processes. As an example of application of the model for the prediction of the deposited thickness uniformity in a 300 mm wafer plasma processing chamber, the results were compared with the experimentally measured deposition profiles along the radius of the wafer varying inter-electrode gap. The simulation results were in good agreement with experimental data.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.251-251
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• 2016

For several decades, industrial processes consume a huge amount of raw water for various objects that consequently results in the generation of large amounts of wastewater. Wastewaters are consisting of complex mixture of different inorganic and organic compounds and some of them can be toxic, hazardous and hard to degrade. These effluents are mainly treated by conventional technologies such are aerobic and anaerobic treatment and chemical coagulation. But, these processes are not suitable for eliminating all hazardous chemical compounds form wastewater and generate a large amount of toxic sludge. Therefore, other processes have been studied and applied together with these techniques to enhance purification results. These include photocatalysis, absorption, advanced oxidation processes, and ozonation, but also have their own drawbacks. In recent years, electrochemical techniques have received attention as wastewater treatment process that could be show higher purification results. Among them, boron doped diamond (BDD) attract attention as electrochemical electrode due to good chemical and electrochemical stability, long lifetime and wide potential window that necessary properties for anode electrode. So, there are many researches about high quality BDD on Nb, Ta, W and Si substrates, but, their application in effluents treatment is not suitable due to high cost of metal and low conductivity of Si. To solve these problems, Ti has been candidate as substrate in consideration of cost and property. But there are adhesion issues that must be overcome to apply Ti as BDD substrate. Al, Cu, Ti and Nb thin films were deposited on Ti substrate to improve adhesion between substrate and BDD thin film. In this paper, BDD films were deposited by hot filament chemical vapor deposition (HF-CVD) method. Prior to deposition, cleaning processes were conducted in acetone, ethanol, and isopropyl alcohol (IPA) using sonification machine for 7 min, respectively. And metal layer with the thickness of 200 nm were deposited by DC magnetron sputtering (DCMS). To analyze microstructure X-ray diffraction (XRD, Bruker gads) and field emission scanning electron microscopy (FE-SEM, Hitachi) were used. It is confirmed that metal layer was effective to adhesion property and improved electrode property. Electrochemical measurements were carried out in a three electrode electrochemical cell containing a 0.5 % H2SO4 in deionized water. As a result, it is confirmed that metal inter layer heavily effect on BDD property by improving adhesion property due to suppressing formation of titanium carbide.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.121.1-121.1
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• 2011

현재 상용화되고 있는 단결정 실리콘 태양전지는 알루미늄 페이스트를 이용하여 후면의 전 영역에 전계를 형성한다. 최근에는 고효율을 얻기 위하여 후면에 패시베이션 효과와 장파장에 대한 반사도를 증가 시키는 SiNx막을 증착 후, 국부적으로 전계를 형성하는 국부 후면 전극(Local back surface field)기술이 연구되고 있다. 본 연구에서는 전면만 텍스쳐 된 단결정 실리콘 웨이퍼를 이용하였다. Plasma Enhanced Chemical Vapor Deposition(PECVD)를 이용하여 전,후면에 SiNx를 증착 하였고 후면의 국부적인 전극 패턴 형성을 위하여 SiNx 식각용 페이스트를 사용한 스크린 프린팅 기술을 이용하였다. 스크린 프린팅을 이용하여 패턴이 형성된 후면에 알루미늄을 인쇄 한 후 Rapid Thermal Process(RTP)를 이용하여 소성 공정 조건을 변화시켰다. 소성 조건 동안 형성되는 후면 전계층은 peak 온도와 승온속도, 냉각 속도에 따라 형상이나 특성이 변화하기 때문에 소성 조건을 변화시키며 국부적 후면 전계 형성의 최적화에 관한 연구를 수행하였다. 패이스트를 이용하여 SiNx를 식각 후 광학 현미경(Optical Microscopy)을 사용하여 SiNx의 식각 유무를 살펴보았고, RTP로 형성된 국부 전계층의 형성 두께, 주변 부분의 형상을 살피기 위해 도핑 영역을 혼합수용액으로 식각하여 주사 전자 현미경(SEM)을 이용하여 관찰 하였다. 또한 후면의 특성을 살펴보기 위해 분광 광도계(UV/VIS/NIR Spectrophotometer)를 사용하여 후면 SiNx층의 유무에 따른 반사도를 비교, 측정 하였다.

• Applied Science and Convergence Technology
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• v.23 no.5
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• pp.248-253
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• 2014

Air Gap Membrane Distillation (AGMD) is one of several technologies that can be used to solve problems fresh water availability. AGMD exhibits several advantages, including low conductive heat loss and higher thermal efficiency, due to the presence of an air gap between the membrane and condensation wall. A previous study by Bhardwaj found that the condensation surface properties (materials and contact angle) affected the total collected fresh water in the solar distillation process. However, the process condition differences between solar distillation and AGMD might result in different condensation phenomena. In contrast, N. Miljkovic showed that a hydrophobic surface has higher condensation heat transfer. Moreover, to the best of our knowledge, there is no study that investigates the effect of condensation surface properties in AGMD to overall process performance (i.e. flux and thermal efficiency). Thus, in this study, we treated the AGMD condensation surface to make it hydrophobic or hydrophilic. The condensation surface could be made hydrophilic by immersing and boiling plate in deionized (DI) water, which caused the formation of hydrophilic aluminum hydroxide (AlOOH) nanostructures. Afterwards, the treated plate was coated using hexamethyldisiloxane (HMDSO) through plasma-enhanced chemical vapor deposition (PECVD). The result indicated that condensation surface properties do not affect the permeate flux or thermal efficiency significantly. In general, the permeate flux and thermal efficiency for the treated plates were lower than those of the non-treated plate (pristine). However, at a 1 mm and 3 mm air gap, the treated plate outperformed the non-treated plate (pristine) in terms of permeate flux. Therefore, although surface wettability effect was not significant, it still provided a little influence.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.490-490
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• 2011

Graphene, hexagonal network of carbon atoms forming a one-atom thick planar sheet, has been emerged as a fascinating material for future nanoelectronics. Huge attention has been captured by its extraordinary electronic properties, such as bipolar conductance, half integer quantum Hall effect at room temperature, ballistic transport over ${\sim}0.4{\mu}m$ length and extremely high carrier mobility at room temperature. Several approaches have been developed to produce graphene, such as micromechanical cleavage of highly ordered pyrolytic graphite using adhesive tape, chemical reduction of exfoliated graphite oxide, epitaxial growth of graphene on SiC and single crystalline metal substrate, and chemical vapor deposition (CVD) synthesis. In particular, direct synthesis of graphene using metal catalytic substrate in CVD process provides a new way to large-scale production of graphene film for realization of graphene-based electronics. In this method, metal catalytic substrates including Ni and Cu have been used for CVD synthesis of graphene. There are two proposed mechanism of graphene synthesis: carbon diffusion and precipitation for graphene synthesized on Ni, and surface adsorption for graphene synthesized on Cu, namely, self-limiting growth mechanism, which can be divided by difference of carbon solubility of the metals. Here we present that large area, uniform, and layer controllable graphene synthesized on Cu catalytic substrate is achieved by acetylene-assisted CVD. The number of graphene layer can be simply controlled by adjusting acetylene injection time, verified by Raman spectroscopy. Structural features and full details of mechanism for the growth of layer controllable graphene on Cu were systematically explored by transmission electron microscopy, atomic force microscopy, and secondary ion mass spectroscopy.

• Korean Journal of Optics and Photonics
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• v.6 no.4
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• pp.310-316
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• 1995

We designed the $1.3/1.55\mum$ WDM directional coupler and its coupling length was calculated with the variation of the two waveguide's core separation and other variables by the Fourier transformed scalar wave equation. We deposited the PSG films for optical waveguide by low pressure chemical vapor deposition and fabricated the WDM coupler using the laser lithography and $CF_4/O_2$ reactive ion etching process. A V -groove which was made to support and fix the optical fiber is fabricated on Si substrate by chemical etching. The WDM coupler and the V-groove are connected using UV curing epoxy. We found that propagation mode of each port of WDM coupler is single mode and maximum extinction ratio between two out ports is 6 dB for $1.3.\mum$, and 12 dB for $1.55\mum$. /TEX>.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.396-396
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• 2013

The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

• Korean Journal of Materials Research
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• v.14 no.2
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• pp.90-93
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• 2004

Silicon dioxide thin films were deposited on p-type Si (100) substrates by atomic layer deposition (ALD) method using alternating exposures of $SiH_2$$Cl_2$ and $O_3$ at $300^{\circ}C$. $O_3$ was generated by corona discharge inside the delivery line of $O_2$. The oxide film was deposited mainly from $O_3$ not from $O_2$, because the deposited film was not observed without corona discharge under the same process conditions. The growth rate of the deposited films increased linearly with increasing the exposures of $SiH_2$$Cl_2$ and $O_3$ simultaneously, and was saturated at approximately 0.35 nm/cycle with the reactant exposures over $3.6 ${\times}$ 10^{9}$ /L. At a fixed $SiH_2$$Cl_2$ exposure of $1.2 ${\times}$ 10^{9}$L, growth rate increased with $O_3$ exposure and was saturated at approximately 0.28 nm/cycle with $O_3$ exposures over$ 2.4 ${\times}$ 10^{9}$ L. The composition of the deposited film also varied with the exposure of $O_3$. The [O]/[Si] ratio gradually increased up to 2 with increasing the exposure of $O_3$. Finally, the characteristics of ALD films were compared with those of the silicon oxide films deposited by conventional chemical vapor deposition (CVD) methods. The silicon oxide film prepared by ALD at $300^{\circ}C$ showed better stoichiometry and wet etch rate than those of the silicon oxide films deposited by low-pressure CVD (LPCVD) and atmospheric-pressure CVD (APCVD) at the deposition temperatures ranging from 400 to $800^{\circ}C$.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.31 no.2
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• pp.57-62
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• 2003

Nano-bending method is presented to measure the Poisson's ratio of thinfilms for MEMS (Micro-Electro-Mechanical Systems) applicaiton. The douvle-ring specimen is designed and fabricated based on the surface micromachining process to facilitate the measurement of the Poisson's ratio. The Poisson's ratio can be obtained through analyzing the linear load-displacement relationship of the double ring specimen subjected to nano-indenter loading. The Present nano-bending mehod is an in-situ measurement approach due to the compatibility to the surface micromachining process. The Poisson's ratio is locally obtained at the location of the double ring specimen with micro dimension. To validate the nano-bending method, the Poisson's ratio of LPCVD (Low Pressure Chemical Vapor Deposition) poly-silicon with thickness of 2.3㎛ is investigated. Experimental results reveal that the Poisson's ratio of the poly-silicon film is 0.2569. The standard deviation of the nano-bending measurement for the stiffness of double ring specimens is 2.66%.