• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 추계학술발표대회
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• pp.24.1-24.1
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• 2011

CMP (Chemical Mechanical Planarization)는 고직접도의 다층구조의 소자를 형성하기 위한 표면연마 공정으로 사용되며, pattern 크기의 감소에 따른 공정 중요도는 증가하고 있다. 반도체 소자 제조 공정에서는 낮은 비용으로 초기재료를 만들 수 있고 우수한 성능의 전기 절연성질을 가지는 산화막을 만들 수 있는 단결정 실리콘 웨이퍼가 주 재료로 사용되고 있으며, 반도체 공정에서 실리콘 웨이퍼 표면의 거칠기는 후속공정에 매우 큰 영향을 미치므로 CMP 공정을 이용한 평탄화 공정이 필수적이다. 다결정 실리콘 박막은 현재 IC, RCAT (Recess Channel Array Transistor), 3차원 FinFET 제조 공정에서 사용되며 CMP공정을 이용한 표면 거칠기의 최소화에 대한 연구의 필요성이 요구되고 있다. 본 연구에서는 알칼리성 슬러리를 이용한 단결정 및 다결정 실리콘의 식각 및 연마거동에 대한 특성평가를 실시하였다. 화학적 기계적 연마공정에서 슬러리의 pH는 슬러리의 분산성, removal rate 등 결과에 큰 영향을 미치고 연마대상에 따라 pH의 최적조건이 달라지게 된다. 따라서 단결정 및 다결정 실리콘 연마공정의 최적 조건을 확립하기 위해 static etch rate, dynamic etch rate을 측정하였으며 연마공정상의 friction force 및 pad의 온도변화를 관찰한 후 removal rate을 계산하였다. 실험 결과, 단결정 실리콘은 다결정 실리콘보다 static/dynamic etch rate과 removal rate이 높은 것으로 나타났으며 슬러리의 pH에 따른 removal rate의 증가율은 다결정 실리콘이 더 높은 것으로 관찰되었다. 또한 다결정 실리콘 연마공정에서는 friction force 및 pad의 온도가 단결정 실리콘 연마공정에 비해 상대적으로 더 높은 것으로 나타났다. 결과적으로 단결정 실리콘의 연마 공정에서는 화학적 기계적인 거동이 복합적으로 작용하지만 다결정 실리콘의 경우 슬러리를 통한 화학적인 영향보다는 공정변수에 따른 기계적인 영향이 재료 연마율에 큰 영향을 미치는 것으로 확인되었으며, 이를 통한 최적화된 공정개발이 가능할 것으로 예상된다.

• 한국결정성장학회지
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• 제10권4호
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• pp.309-317
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• 2000

Langasite is a promising new piezoelectric material for SAW filter application. Little was known until recently about the methods needed to mechanically polish and chemically polish/etch this material. In this experiment, polishing, slurry chemistry and chemical wet etching for langasite is described. Conventional quartz and LN ($LiNbO_3$) polishing methods did not produce satisfactory polished surfaces, and polishing with a colloidal silica slurries has shown to be most effective. The optimum condition was investigated by changing the slurry chemistry. As the planarization effect is very important in SAW filter applications, the examination of the effective particle number effect and the particle size effect was carried out. Z-cut langasite surface which had been polished with the colloidal silica slurries was etched in a variety of etchants. Conventional quartz etchants destroyed the polished surface. Other etchants formed a thin film on the surfaces. In this experiment, the reaction between langasite and a few etching solution was analysed. And an appropriate selective etchant solution for analyzing the defects was synthesized.

• 한국광물학회지
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• 제21권2호
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• pp.201-208
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• 2008

최근 기능성 나노물질로서 반도체 공정 중 기계.화학적 평탄화(CMP)용 연마제로 중요하게 사용되는 세리아(Ceria, $CeO_2$)에 대해서 X-선 회절분석을 실시하여 리트벨트법에 의한 상세한 구조해석 및 세리아의 입자크기와 미세응력을 측정하였다. 두 시료(RT735. RT835)의 리트벨트 계산 결과 R지수 값은 각각 $R_p(%)=8.50$, 8.34; $R_{wp}(%)=13.4$, 13.5; $R_{exp}(%)=11.3$, 11.5; $R_B(%)=2.21$, 2.36; S(GofF: Goodness of fit)=1.2, 1.2를 보여주며 계산이 잘 이루어졌음을 알 수 있다. $CeO_2$는 공간군 Fm3m을 가지며, 격자상수는 a=5.41074(2), 5.41130(6) ${\AA}$, V=158.406(1), 158.455(3) ${\AA}^3$으로 각각 계산되었다. 입자크기 및 미세응력 계산 결과, RT735의 평균 입자크기와 최대 응력은 37.42(1) nm, 0.0026이며, RT835는 72.80(2) nm, 0.0013으로 각각 결정되었다. 입자크기와 미세응력은 서로 반비례함을 알 수 있다.

• 품질경영학회지
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• 제45권2호
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• pp.293-306
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• 2017

Purpose: In this study, an optimal design level of influencing factors on semiconductor polishing process was determined to minimize flexion of both sides on wafers. Methods: First, significant interactions are determined by the stepwise regression method. ANOVA analysis on SN ratio and mean of dependent variable are performed to draw mean adjustment factors. In addition, the optimal levels of mean adjustment factors are decided by comparing means of each level of mean adjustment factors. Results: As a result of ANOVA, a mean adjustment factor was determined as a width of formed flexion on the plate. The mean of the difference has the nearest to 0 in the case when the width of formed flexion has level 2 (4mm). Conclusion: Optimal design levels of semiconductor polishing process are determined as follows; (i) load applied to the wafer carrier has a level 1 (3psi), (ii) load applied to the wafer has a level 1(3psi), (iii) the amount of slurry supplied during polishing has a level 3 (300 co/min), (iv) the width of formed flexion on the plate has level 2 (4mm).

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권4호
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• pp.402-409
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• 2013

An innovative application of voltage-contrast (VC) inspection allowed inline detection of NMOS leakage in dense SRAM cells is presented. Cell sizes of SRAM are continual to do the shrinkage with bit density promotion as semiconductor technology advanced, but the resulting challenges include not only development of smaller-scale devices, but also intra-devices isolation. The NMOS leakage caused by the underneath n+/P-well shorted to the adjacent PMOS/N-well was inspected by the proposed electron-beam (e-beam) scan in which VC images were compared during the in-line process step of post contact tungsten (W) CMP (Chemical Mechanical Planarization) instead of end-of-line electrical test, which has a long response time. A series of experiments based on the mechanism for improving the intra-well isolation was performed and verified by the inline VC inspection. An optimal process-integration condition involved to the tradeoff between the implant dosage and photo CD was carried out.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.171-175
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• 2001

Chemical mechanical polishing(CMP) process has been widely used to planarize dielectrics and metal, which can apply to employed in integrated circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of free-defects in inter level dielectrics and metal. Especially, defects like (micro-scratch) lead to severe circuit failure, and affects yield. Current conditioning method - bladder type, orbital pad motion - usually provides unsuitable pad profile during ex-situ conditioning near the end of pad life. Since much of the pad wear occurs by the mechanism of bladder tripe conditioning and its orbital motion without rotation, we need to implement new ex-situ conditioner which can prevent abnormal regional force on pad caused by bladder-type and also need to rotate the pad during conditioning. Another important study of ADPC is related to the orbital scratch of which source is assumed as diamond grit dropped from the strip during ex-situ conditioning. Scratch from diamond grit damaged wafer severely so usual1y scraped. Figure 1 shows the typical shape of scratch damaged from diamond. We suspected that intensive forces to the edge area of bladder type stripper accelerated the drop of Diamond grit during conditioning, so new designed Flat stripper was introduced.

• Industrial Engineering and Management Systems
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• 제4권1호
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• pp.54-67
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• 2005

This paper provides an evaluation of an optimization-based, multiple-input double-output (MIDO) run-to-run (R2R) control scheme for general semiconductor manufacturing processes. The controller in this research, termed adaptive dual response optimizing controller (ADROC), can serve as a process optimizer as well as a recipe regulator between consecutive runs of wafer fabrication. In evaluation, it is assumed that the equipment model could be appropriately described by a pair of second-order polynomial functions in terms of a set of controllable variables. Of practical relevance is to consider a drifting effect in the equipment model since in common semiconductor practice the process tends to drift due to machine aging and tool wearing. We select a typical application of R2R control to chemical mechanical planarization (CMP) in semiconductor manufacturing in this evaluation, and there are five different CMP process scenarios demonstrated, including mean shift, variance increase, and IMA disturbances. For the controller, ADROC, an on-line estimation technique is implemented in a self-tuning (ST) control manner for the adaptation purpose. Subsequently, an ad hoc global optimization algorithm based on the dual response approach, arising from the response surface methodology (RSM) literature, is used to seek the optimum recipe within the acceptability region for the execution of next run. The main components of ADROC are described and its control performance is assessed. It reveals from the evaluation that ADROC can provide excellent control actions for the MIDO R2R situations even though the process exhibits complicated, nonlinear interaction effects between control variables, and the drifting disturbances.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.1288-1291
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• 2004

In this study, physical characteristics of alumina slurry on variation of pH value and the effect of non-ionic surfactants on alumina slurry for copper chemical mechanical planarization (CMP) slurry have been investigated. After pH value of the slurry with alumina abrasive was changed by adding various amount of $HNO^3$ or KOH, the differences of settling rate, particle size, and zeta-potential were estimated. Better settling rates were shown in slurries with alumina abrasive at near pH 1. Higher zeta-potential was shown at around pH 2 in alumina slurry and the point of zero charge (PZC) was measured at about pH $9\sim10$. Non-ionic surfactant was added in the slurry with 5wt% alumina abrasive to get its effect on slurry practically. Abrasive size was smaller increased when amount of surfactant increased in slurry with P-4 as abrasive; on the other side, it was smaller when amount of surfactant decreased with AES-12. Variation of zeta-potential has no tendency with adding surfactant; however, values of zeta-potential were between $35\sim50mV$. The proper amount of surfactant was $0.1\sim1.0wt%$ in slurry with P-4 and $0.5\sim1.0wt%$ in slurry with AES-12 respectively. Excellent dispersion stabilization was obtained by addition of non-ionic surfactant