• Title/Summary/Keyword: Cell-chip

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A 3-stage Wideband Q-band Monolithic Amplifier for WLAN

  • Kang, Dong-Min;Lee, Jin-Hee;Yoon, Hyung-Sup;Shim, Jae-Yeob;Lee, Kyung-Ho
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1054-1057
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    • 2002
  • The design and fabrication of Q-band 3-stage monolithic microwave integrated circuit(MMIC) amplifier for WLAN are presented using 0.2$\square$ AIGaAs/lnGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT). In each stage of the MMIC, a negative feedback is used for both broadband and good stability. The measurement results are achieved as an input return loss under -4dB, an output return loss under -10dB, a gain of 14dB, and a PldB of 17dBm at Q-band(36~44GHz). These results closely match with design results. The chip size is 2.8${\times}$1.3mm$^2$. This MMIC amplifier will be used as the unit cell to develop millimeter-wave transmitters for use in wideband wireless LAN systems.

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Improving data reliability on oligonucleotide microarray

  • Yoon, Yeo-In;Lee, Young-Hak;Park, Jin-Hyun
    • Proceedings of the Korean Society for Bioinformatics Conference
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    • 2004.11a
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    • pp.107-116
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    • 2004
  • The advent of microarray technologies gives an opportunity to moni tor the expression of ten thousands of genes, simultaneously. Such microarray data can be deteriorated by experimental errors and image artifacts, which generate non-negligible outliers that are estimated by 15% of typical microarray data. Thus, it is an important issue to detect and correct the se faulty probes prior to high-level data analysis such as classification or clustering. In this paper, we propose a systematic procedure for the detection of faulty probes and its proper correction in Genechip array based on multivariate statistical approaches. Principal component analysis (PCA), one of the most widely used multivariate statistical approaches, has been applied to construct a statistical correlation model with 20 pairs of probes for each gene. And, the faulty probes are identified by inspecting the squared prediction error (SPE) of each probe from the PCA model. Then, the outlying probes are reconstructed by the iterative optimization approach minimizing SPE. We used the public data presented from the gene chip project of human fibroblast cell. Through the application study, the proposed approach showed good performance for probe correction without removing faulty probes, which may be desirable in the viewpoint of the maximum use of data information.

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Optical Proximity Correction of Photomask with a Monte-Carlo Method (몬테-칼로 기법을 사용한 포토마스크의 결상 왜곡 보정)

  • 이재철;오용호;임성우
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.10
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    • pp.76-82
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    • 1998
  • As the minimum feature size of a semiconductor chip gets smaller, the inevitable distortion of patterned image by optical lithography becomes the limiting factor in the mass production of VLSI. The optical proximity correction (OPC), which corrects pattern distortion that originates from the resolution limit of optical lithography, is becoming indispensable technology. In this paper, we describe a program that corrects optical proximity effect and thus finds the optimum mask pattern with a Monte-Carlo method. The program was applied to real memory cell patterns to produce mask patterns that generate image patterns closer to object images than original mask patterns, and increase of process margin is expected, as well.

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Correlation Between EGFR Mutations and Serum Tumor Markers in Lung Adenocarcinoma Patients

  • Pan, Jin-Bing;Hou, Yu-Hong;Zhang, Guo-Jun
    • Asian Pacific Journal of Cancer Prevention
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    • v.14 no.2
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    • pp.695-700
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    • 2013
  • Background: Mutations affecting the epidermal growth factor receptor (EGFR) are good predictors of clinical efficacy of EGFR tyrosine kinase inhibitors (TKI) in patients with non-small cell lung cancer. Serum carcinoembryonic antigen (CEA) levels are also regarded as predictive for the efficacy of EGFR-TKI and EGFR gene mutations. This study analyzed the association between EGFR gene mutations and clinical features, including serum tumor marker levels in lung adenocarcinomas patients. Patients and Methods: A total of 70 lung adenocarcinoma patients with complete clinical data and pathological specimens were investigated. EGFR gene mutations at exons 19 and 21 were assessed. Serum tumor markers were detected by protein chip-chemiluminescence at the corresponding time, and correlations were analyzed. Results: Mutations of the EGFR gene were detected in 27 of the 70 patients and the serum CEA and CA242 concentrations were found to be significantly associated with the incidence of EGFR gene mutations (P<0.05). The AUCs for CEA and CA242 were 0.724 (95% CI: 0.598~0.850, P<0.05) and 0.769 (95% CI: 0.523~0.800, P<0.05) respectively. Conclusions: Serum CEA and CA242 levels are associated with mutations of the EGFR gene in patients with lung adenocarcinomas.

Design and FPGA Implementation of the Scalar Multiplier for a CryptoProcessor based on ECC(Elliptic Curve Cryptographics) (ECC(Elliptic Curve Crptographics) 기반의 보안프로세서를 위한 스칼라 곱셈기의 FPGA 구현)

  • Choi, Seon-Jun;Hwang, Jeong-Tae;Kim, Young-Chul
    • Proceedings of the Korea Information Processing Society Conference
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    • 2005.05a
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    • pp.1071-1074
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    • 2005
  • The ECC(Elliptic Curve Cryptogrphics), one of the representative Public Key encryption algorithms, is used in Digital Signature, Encryption, Decryption and Key exchange etc. The key operation of an Elliptic curve cryptosystem is a scalar multiplication, hence the design of a scalar multiplier is the core of this paper. Although an Integer operation is computed in infinite field, the scalar multiplication is computed in finite field through adding points on Elliptic curve. In this paper, we implemented scalar multiplier in Elliptic curve based on the finite field $GF(2^{163})$. And we verified it on the Embedded digital system using Xilinx FPGA connected to an EISC MCU(Agent 2000). If my design is made as a chip, the performance of scalar multiplier applied to Samsung $0.35\;{\mu}m$ Phantom Cell Library is expected to process at the rate of 8kbps and satisfy to make up an encryption processor for the Embedded digital information home system.

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Design of 234.7 MHz Mixed Mode Frequency Multiplication & Distribution ASIC for ATM Switching System (ATM 교환기용 234.7 MHz 혼합형 주파수 체배분배 ASIC의 설계)

  • 채상훈;정희범
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.10A
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    • pp.1597-1602
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    • 1999
  • An analog / digital mixed mode frequency multiplication and distribution ASIC for switch link or network synchronization of ATM switching system for B-ISDN has designed. This ASIC generates 234-7 MHz system clock and 77.76 MHz, 19.44 MHz user clocks using 46.94 MHz external clock. It also includes digital circuits for checking and selecting between the two external clocks. For effective ASIC design, full custom technique is used in analog PLL circuit and standard cell based technique is used in digital circuit. Resistors and capacitors are specially designed so the chip can be implemented in 0.8$\mu\textrm{m}$ digital CMOS technology.

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Development of Macro-Porous Silicon Based Dye-Sensitized Solar Cells with Improved Light Trapping

  • Aliaghayee, Mehdi;Fard, Hassan Ghafoori;Zandi, Ashkan
    • Journal of Electrochemical Science and Technology
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    • v.7 no.3
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    • pp.218-227
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    • 2016
  • The light harvesting efficiency is counted as an important factor in the power conversion efficiency of DSSCs. There are two measures to improve this parameter, including enhancing the dye-loading capacity and increasing the light trapping in the photoanode structure. In this paper, these tasks are addressed by introducing a macro-porous silicon (PSi) substrate as photoanode. The effects of the novel photoanode structure on the DSSC performance have been investigated by using energy dispersive X-ray spectroscopy, photocurrent-voltage, UV-visible spectroscopy, reflectance spectroscopy, and electrochemical impedance spectroscopy measurements. The results indicated that bigger porosity percentage of the PSi structure improved the both anti-reflective/light-trapping and dye-loading capacity properties. PSi based DSSCs own higher power conversion efficiency due to its remarkable higher photocurrent, open circuit voltage, and fill factor. Percent porosity of 64%, PSi(III), resulted in nearly 50 percent increment in power conversion efficiency compared with conventional DSSC. This paper showed that PSi can be a good candidate for the improvement of light harvesting efficiency in DSSCs. Furthermore, this study can be considered a valuable reference for more investigations in the design of multifunctional devices which will profit from integrated on-chip solar power.

Large-Circular Single-stranded Sense and Antisense DNA for Identification of Cancer-Related Genes (장환형 단일가닥 DNA를 이용한 암세포 성장 억제 유전자 발굴)

  • Bae, Yun-Ui;Moon, Ik-Jae;Seu, Young-Bae;Doh, Kyung-Oh
    • Microbiology and Biotechnology Letters
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    • v.38 no.1
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    • pp.70-76
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    • 2010
  • The single-stranded large circular (LC)-sense DNA were utilized as probes for DNA chip experiments. The microarray experiment using LC-sense DNA probes found differentially expressed genes in A549 cells as compared to WI38VA13 cells, and microarray data were well-correlated with data acquired from quantitative real-time RT-PCR. A 5K LC-sense DNA microarray was prepared, and the repeated experiments and dye swap test showed consistent expression patterns. Subsequent functional analysis using LC-antisense library of overexpressed genes identified several genes involved in A549 cell growth. These experiments demonstrated proper feature of LC-sense molecules as probe DNA for microarray and the potential utility of the combination of LC-sense microarray and antisense libraries for an effective functional validation of genes.

Implementation of sigma-delta A/D converter IP for digital audio

  • Park SangBong;Lee YoungDae
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.199-203
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    • 2004
  • In this paper, we only describe the digital block of two-channel 18-bit analog-to-digital (A/D) converter employing sigma-delta method and xl28 decimation. The device contains two fourth comb filters with 1-bit input from sigma­delta modulator. each followed by a digital half band FIR(Finite Impulse Response) filters. The external analog sigma-delta modulators are sampled at 6.144MHz and the digital words are output at 48kHz. The fourth-order comb filter has designed 3 types of ways for optimal power consumption and signal-to-noise ratio. The following 3 digital filters are designed with 12tap, 22tap and 116tap to meet the specification. These filters eliminate images of the base band audio signal that exist at multiples of the input sample rate. We also designed these filters with 8bit and 16bit filter coefficient to analysis signal-to-noise ratio and hardware complexity. It also included digital output interface block for I2S serial data protocol, test circuit and internal input vector generator. It is fabricated with 0.35um HYNIX standard CMOS cell library with 3.3V supply voltage and the chip size is 2000um by 2000um. The function and the performance have been verified using Verilog XL logic simulator and Matlab tool.

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A Decoder Design for High-Speed RS code (RS 코드를 이용한 복호기 설계)

  • 박화세;김은원
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.1
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    • pp.59-66
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    • 1998
  • In this paper, the high-speed decoder for RS(Reed-Solomon) code, one of the most popular error correcting code, is implemented using VHDL. This RS decoder is designed in transform domain instead of most time domain. Because of the simplicity in structure, transform decoder can be easily realized VLSI chip. Additionally the pipeline architecture, which is similar to a systolic array is applied for all design. Therefore, This transform RS decoder is suitable for high-rate data transfer. After synthesis with FPGA technology, the decoding rate is more 43 Mbytes/s and the area is 1853 LCs(Logic Cells). To compare with other product with pipeline architecture, this result is admirable. Error correcting ability and pipeline performance is certified by computer simulation.

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