• 디지털산업정보학회논문지
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• 제18권4호
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• pp.31-40
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• 2022

YOLOv4 can be used for detecting parking vehicles in order to check a vehicle in out-door parking space. YOLOv4 has 9 anchor boxes in each of 13x13 grid cells for detecting a bounding box of object. Because anchor boxes are allocated based on each cell, there can be existed small observational error for detecting real objects due to the distance between neighboring cells. In this paper, we proposed YOLOv4 grid cell shift algorithm for improving the out-door parking vehicle detection accuracy. In order to get more chance for trying to object detection by reducing the errors between anchor boxes and real objects, grid cells over image can be shifted to vertical, horizontal or diagonal directions after YOLOv4 basic detection process. The experimental results show that a combined algorithm of a custom trained YOLOv4 and a cell shift algorithm has 96.6% detection accuracy compare to 94.6% of a custom trained YOLOv4 only for out door parking vehicle images.

• 대한전자공학회논문지SD
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• 제48권10호
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• pp.25-32
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• 2011

MLC NAND flash memory에서 cell간의 기생 커패시턴스 커플링으로 인해 발생하는 CCI에 의한 data error를 개선하기 위한 알고리듬을 제안하였다. 종래의 victim cell 주변 8-cell model보다 에러보정 알고리듬에 적용이 용이한 3-cell model을 제시하였다. 3-cell CCI model의 성능을 입증하기 위해 30nm와 20nm급 공정의 MLC NAND flash memory의 data분포를 분석하여, 주변 cell의 data pattern에 의한 victim cell의 Vth shift관계를 확인하였다. 측정된 Vth분포 data에 MatLab을 이용하여 제안된 알고리듬을 적용하는 경우 BER이 LSB에서는 28.9%, MSB에는 19.8%가 개선되었다.

• Journal of Electrical Engineering and Technology
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• 제3권1호
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• pp.130-134
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• 2008

The increasing size of very large scale integration (VLSI) circuits, high transistor density, and popularity of low-power circuit and system design are making the minimization of power dissipation an important issue in VLSI design. Test Power dissipation is exceedingly high in scan based environments wherein scan chain transitions during the shift of test data further reflect into significant levels of circuit switching unnecessarily. Scan chain or cell modification lead to reduced dissipations of power. The ETC algorithm of previous work has weak points. Taking all of this into account, we therefore propose a new algorithm. Its name is RE_ETC. The proposed modifications in the scan chain consist of Exclusive-OR gate insertion and scan cell reordering, leading to significant power reductions with absolutely no area or performance penalty whatsoever. Experimental results confirm the considerable reductions in scan chain transitions. We show that modified scan cell has the improvement of test efficiency and power dissipations.

• 한국멀티미디어학회논문지
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• 제17권12호
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• pp.1418-1429
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• 2014

In this paper we suggest a new two-wheelers detection algorithm using local cell features. The first, we propose new feature vector matrix extraction algorithm using the correlation two cells based on local cell histogram and shifting from the result of histogram of oriented gradients(HOG). The second, we applied new weighting values which are calculated by the modified histogram intersection showing the similarity of two cells. This paper applied the Adaboost algorithm to make a strong classification from weak classification. In this experiment, we can get the result that the detection rate of the proposed method is higher than that of the traditional method.

• 정보보호학회논문지
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• 제15권4호
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• pp.3-10
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• 2005

이 논문에서는 최대길이를 갖는 90/150 셀룰라 오토마타로부터 얻어진 수열에 대해 대수적으로 연구한다. GF(2) 위에서 최대길이를 갖는 n-셀 90/150 셀룰라 오토마타는 길이가 $2^n-1$인 수열을 생성한다. 이러한 셀룰라 오토마타의 임의의 셀에 대한 출력수열은 다른 셀에 대한 출력수열의 위치를 이동함으로써 얻어질 수 있다. LFSR과는 달리, 셀룰라 오토마타의 셀들에 대한 출력수열들의 위상이동차는 일반적으로 셀룰라 오토마타의 단계들 사이에서 다르다. 본 논문에서는 이러한 셀들 사이의 상대적인 위상이동차를 계산하는 알고리즘을 제시한다. 이 알고리즘은 Sarkar의 알고리즘과 달리 Shank의 알고리즘을 이용하지 않으며, 원하는 위치의 위상이동차를 계산하기 위하여 이전 셀의 위치의 위상이동차를 계산할 필요가 없으며 수행시간은 $O(2^n)$이다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.82-85
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• 1998

Because ATM was originally designed for the optical fiber environment with bit error rate(BER) of 10-11, it is difficult to maintain ATM cell extraction capability in wireless environment where BER ranges from 10-6 to 10-3. Therefore, it must be proposed the algorithm of ATM cell extraction in wereless environment. In this paper, the frame structure and synchronization algorithm satisfyling the above condition are explained, and the new ASIC implementation method of this algorithm is proposed. The known method using shift register needs so many gates that it is not suitable for ASIC implementation. But in the proposed method, a considerable reduction in gate count can be achieved by using random access memory.

• International Journal of Control, Automation, and Systems
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• 제4권5호
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• pp.637-644
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• 2006

Biomedical image is often complex. An applied image analysis system should deal with the images which are of quite low quality and are challenging to segment. This paper presents a framework for color cell image segmentation by learning and classification online. It is a robust two-stage scheme using kernel method and watershed transform. In first stage, a two-class SVM is employed to discriminate the pixels of object from background; where the SVM is trained on the data which has been analyzed using the mean shift procedure. A real-time training strategy is also developed for SVM. In second stage, as the post-processing, local watershed transform is used to separate clustering cells. Comparison with the SSF (Scale space filter) and classical watershed-based algorithm (those are often employed for cell image segmentation) is given. Experimental results demonstrate that the new method is more accurate and robust than compared methods.

• 한국정보통신학회논문지
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• 제21권7호
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• pp.1267-1275
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• 2017

NIST 표준에 정의된 이진체(binary field) 상의 233-비트 타원곡선을 지원하는 타원곡선 암호(elliptic curve cryptography; ECC) 프로세서를 설계하였다. 타원곡선 암호 시스템의 핵심 연산인 스칼라 점 곱셈을 수정형 Montgomery ladder 알고리듬을 이용하여 구현함으로써 단순 전력분석에 강인하도록 하였다. 점 덧셈과 점 두배 연산은 아핀(affine) 좌표계를 기반으로 유한체 $GF(2^{233})$ 상의 곱셈, 제곱, 나눗셈으로 구현하였으며, shift-and-add 방식의 곱셈기와 확장 유클리드 알고리듬을 이용한 나눗셈기를 적용함으로써 저면적으로 구현하였다. 설계된 ECC 프로세서를 Virtex5 FPGA로 구현하여 정상 동작함을 확인하였다. $0.18{\mu}m$ 공정의 CMOS 셀 라이브러리로 합성한 결과 49,271 GE로 구현되었고, 최대 345 MHz의 동작 주파수를 갖는다. 스칼라 점 곱셈에 490,699 클록 사이클이 소요되며, 최대 동작 주파수에서 1.4 msec의 시간이 소요된다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.24-33
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• 2012

This paper describes a multi-mode LDPC decoder which supports 19 block lengths and 6 code rates of Quasi-Cyclic LDPC code for Mobile WiMAX system. To achieve an efficient implementation of 114 operation modes, some design optimizations are considered including block-serial layered decoding scheme, a memory reduction technique based on the min-sum decoding algorithm and a novel method for generating the cyclic shift values of parity check matrix. From fixed-point simulations, decoding performance and optimal hardware parameters are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 380,000 gates and 52,992 bits RAM, and the estimated throughput is about 164 ~ 222 Mbps at 56 MHz@1.8 V.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.158.5-158
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• 2001

Monopulse active homing radar requires velocity and angle information of target to track fast moving target. Target velocity can be estimated by measuring the frequency shift between transmitted and received frequencies. Angle information is obtained by measuring boresight error. Measurement of doppler frequency component in received signal is done through FFT analysis and interpolation algorithm for fine tuning. Boresight errors in azimuth and elevation axes are proportional to the power of each difference channel relative to sum channel. The target signal power in difference channel is estimated more precisely by measuring the power of FFT result cell of maximum ...