Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A 3-cell CCI(Cell-to-Cell Interference) model and error correction algorithm for Multi-level cell NAND Flash Memories

다중셀 낸드 플래시 메모리의 3셀 CCI 모델과 이를 이용한 에러 정정 알고리듬

  • Jung, Jin-Ho (Dept. Electrical Engineering, Chungbuk National University) ;
  • Kim, Shi-Ho (School of Integrated Technology, and Yonsei Institute of Convergence Technology, Yonsei University)
  • 정진호 (충북대학교 전기공학과) ;
  • 김시호 (연세대학교 글로벌융합공학부 & 미래융합 기술연구소)
  • Received : 2011.06.30
  • Accepted : 2011.10.10
  • Published : 2011.10.25
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Abstract

We have analyzed adjacent cell dependency of threshold voltage shift caused by the cell to cell interference, and we proposed a 3-adjacent-cell model to model the pattern dependency of the threshold voltage shift. The proposed algorithm is verified by using MATLAB simulation and measurement results. In the experimental results, we found that accuracy of the proposed simple 3-adjacient-cell model is comparable to the widely used conventional 8-adjacient-cell model. The Bit Error Rate (BER) of LSB and of MSB is improved by 28.9% and 19.8%, respectively, by applying the proposed algorithm based on 3-adjacent-cell model to 20nm-class 2-bit MLC NAND flash memories.

MLC NAND flash memory에서 cell간의 기생 커패시턴스 커플링으로 인해 발생하는 CCI에 의한 data error를 개선하기 위한 알고리듬을 제안하였다. 종래의 victim cell 주변 8-cell model보다 에러보정 알고리듬에 적용이 용이한 3-cell model을 제시하였다. 3-cell CCI model의 성능을 입증하기 위해 30nm와 20nm급 공정의 MLC NAND flash memory의 data분포를 분석하여, 주변 cell의 data pattern에 의한 victim cell의 Vth shift관계를 확인하였다. 측정된 Vth분포 data에 MatLab을 이용하여 제안된 알고리듬을 적용하는 경우 BER이 LSB에서는 28.9%, MSB에는 19.8%가 개선되었다.

Keywords

References

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