• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.32-39
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• 2010

Conventional cell characterization does not consider Multiple Input Switching(MIS). Since the impact of MIS on gate delay variation is large, it is not possible to predict the accurate gate delay with the conventional cell characterization. We observed the maximum 46% difference in gate delay due tn MIS. In this paper, we propose a gate delay model considering the delay variation caused by the temporal proximity of MIS. The proposed model calculates the delay variation using the Radial Basis Function. The experimental results show that the proposed method can more accurately predict the gate delay when MIS occurs.

• ETRI Journal
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• v.24 no.5
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• pp.360-372
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• 2002

In this paper, we propose the modified dynamic weighted round robin (MDWRR) cell scheduling algorithm, which guarantees the delay property of real-time traffic and also efficiently transmits non-real-time traffic. The proposed scheduling algorithm is a variation of the dynamic weighted round robin (DWRR) algorithm and guarantees the delay property of real-time traffic by adding a cell transmission procedure based on delay priority. It also uses a threshold to prevent the cell loss of non-real-time traffic that is due to the cell transmission procedure based on delay priority. Though the MDWRR scheduling algorithm may be more complex than the conventional DWRR scheme, considering delay priority minimizes cell delay and decreases the required size of the temporary buffer. The results of our performance study show that the proposed scheduling algorithm has better performance than the conventional DWRR scheme because of the delay guarantee of real-time traffic.

• Journal of IKEEE
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• v.20 no.2
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• pp.167-170
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• 2016

Replica bit-line technique is used for making enable signal of sense amplifier which accurately tracks bit-line of SRAM. However, threshold voltage variation in the replica bit-line circuit changes the cell current, which results in variation of the sense amplifier enable time, $T_{SAE}$. The variation of $T_{SAE}$ makes the sensing operation unstable. In this paper, in addition to conventional replica bit-line delay ($RBL_{conv}$), dual replica bit-line delay (DRBD) and multi-stage dual replica bit-line delay (MDRBD) which are used for reducing $T_{SAE}$ variation are briefly introduced, and the maximum possible number of on-cell which can satisfy $6{\sigma}$ sensing yield is determined through simulation at a supply voltage of 0.6V with 14nm FinFET technology. As a result, it is observed that performance of DRBD and MDRBD is improved 24.4% and 48.3% than $RBL_{conv}$ and energy consumption is reduced which 8% and 32.4% than $RBL_{conv}$.

• The Transactions of the Korea Information Processing Society
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• v.3 no.3
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• pp.512-522
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• 1996

To provide broadband ISDN service for the users in scattered locations, the application of satellite communications network is seriously considered. To trans mit ATM cells efficiently in satellite communications, it is effective to use TDM A method. However, it is necessary to have a method to compensate the cell delayvari-ation caused by the difference between TDMA and ATM. This paper optimized the cell control time(Tc) when traffic inputs have poisson or markov modulated poisson process by applying cell delay variation characteristics of time stamp method, which has the most advantages among compensation methods or cell delay variation. This paper also intorduces a method of reducing the cell clumping phenomena by adapting discrete time stamp method, including the analysis and evalutation of the range of required quality of CDV distribution by ATM transmission.The result of the experiment shows that CDV distribution-range can be controlled to 1.2$\times$Tc which reduces overall cell delay variation by discrrete time stamp method.

• The Transactions of the Korea Information Processing Society
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• v.3 no.2
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• pp.295-304
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• 1996

Toprovide economical BISDN service, with which integration process of many types of media is possible, it is necessary to construct a system with ground network and satellite network combined. The method for this type of transmission using satellite is TDMA that can provide services to many users in various area. However, the most difficult task to connect TDMA which uses synchronous method to ATM which used asynchronous transfer mode is the deterioration n of ATM transmission quality such as cell delay variation. Therefore, it is necessary to develop delay variation compensation method which can confront to the ATM. Efficient ways to use satellite links under the conditions such that maximum efficiency of the delay variation is limited under the required value, and the burst characteristic of transmission cell does not increase are being researched for translation between in ATM and TDMA. This paper points out the problems when time stamp method, reviewd in ground network, is applied to the satellite links to compensate the delay variation .To solve the problem, discrete cell count method is introduced along with the calculation of transmission capacity and error rate.Also, from the observation of stab-ility of the system and verification of reliability even when singal error occurred in the cell transmission timing information, the proposed compensation method appeared to be excellent.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.397-404
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• 2012

Thermal generation by power dissipation of the highly integrated System on Chip (SoC) device is irregularly distributed on the intra chip. It leads to thermal increment of the each thermally different region and effects on the propagation timing; consequently, the timing violation occurs due to the misestimated number of buffers. In this paper, the timing budgeting methodology considering thermal variation which contains buffer insertion with wire segmentation is proposed. Thermal aware LUT modeling for cell intrinsic delay is also proposed. Simulation results show the reduction of the worst delay after implementing thermal aware buffer insertion using by proposed wire segmentation up to 33% in contrast to the original buffer insertion. The error rates are measured by SPICE simulation results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10B
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• pp.1852-1860
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• 1999

This paper studied performance of the AAL2 for variable rate real time services in ATM network with discrete-time simulation model. In this simulation, input parameters are packet fill delay for AAL2 PDU generation, guard time for ATM cell generation, burstness and number of channels. Though variation of the above mentioned parameters, we obtained end-to end delay variations and throughput, analyzed performance effect of the each parameter for voice packet service.

• The KIPS Transactions:PartC
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• v.8C no.6
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• pp.805-814
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• 2001

In this paper, we propose a new scheduling algorithm that guarantees the delay property of real-time traffic, not considered in previous DWRR(Dynamic Weighted Round Robin) algorithm and also transmits non-real-time traffic efficiently. The proposed scheduling algorithm is a variation of DWRR algorithm to guarantee the delay property of real-time traffic by adding cell transmission method based on delay priority. It also uses the threshold to prevent the cell loss of non-real-time traffic due to cell transmission method based on delay priority. Proposed scheduling algorithm may increase some complexity over conventional DWRR scheme because of cell transmission method based on delay priority. However, the consideration of delay priority can minimize cell delay and require less size of temporary buffer. Also, the results of our performance study shows that the proposed scheduling algorithm has better performance than conventional DWRR scheme due to reliable ABR service and congestion avoidance capacity.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.8
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• pp.31-38
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• 1995

In this paper, we consider the leaky bucket parameter dimensioning problem in the presence of the cell delay variation(CDV) which arises at the customer premises network dud to the multiplexing with other traffic streams. We consider an ATM multiplexer in which a single CBR stream and several heterogeneous VBR traffic streams are multiplexed. Choosing an MMPP model for the bursty traffic streams, we derive an (MMPP+DD)/D/1/K queueing model for the evaluation of the CDV experienced by the CBR stream. We first evaluate the equilibrium queue length distribution embedded at tagged-cell arrival-time instants, based on whcih we calcuate the inter-cell time distribution and the distribution kof the number of tagged-cell departures in an arbitrary interval. Then we apply the analysis to the dimensionging problem of the leaky bucket parameters, examining how the employed traffic model affects the determination of the bucket size. Through numerical examples, we confirm that the Poisson traffic model can underestimate the bucket size, thus causing a considerable blocking probability for compliant use cells while the MMPP model can optimally design the bucket size which keeps the blocking probability under the target value.

• Journal of the Korea Safety Management & Science
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• v.2 no.4
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• pp.165-176
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• 2000

Broadband networks are designed to support a wide variety of services with different traffic characteristics and demands for Quality of Services. Bandwidth allocation methods can be classified into two major categories： static and dynamic. In static allocation, bandwidth is allocated only at call setup time and the allocated bandwidth is maintained during a session. In dynamic allocation, the allocated bandwidth is negotiated during a session. The purpose of this paper is to develop policies for deciding and for adjusting the amount of bandwidth requested for a best effort connection over such as ATM networks.. This method is to develop such policies that a good trade off between utilization and latency using cell delay variation to the forecast the incoming traffic in the next period. The performances of the different polices are compared by simulations.