• 제목/요약/키워드: Cascaded Application

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SOI 슬롯 광도파로 기반 캐스케이드 링 공진기 바이오·케미컬 집적광학 센서의 효용성 해석 (Application Utility Analysis of Series-cascaded Ring Resonators Based on SOI Slot Optical Waveguides in Integrated Optical Biochemical Sensor)

  • 장재식;정홍식
    • 센서학회지
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    • 제31권5호
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    • pp.353-359
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    • 2022
  • This study investigated via computational analysis the application utility of series-cascaded ring resonators based on silicon-on-insulator (SOI) slot optical waveguides in integrated optical biochemical sensors. The radii of the two rings in the series-cascaded ring resonators were 59.4 ㎛ and 77.6 ㎛ respectively, and the coupling distance was 0.5 ㎛. The series-cascaded ring resonators were computationally analyzed using FIMMProp and PICWave numerical software. The free spectral range (FSR), full width at half maximum (FWHM), sensitivity, and quality-factor (Q-factor) of the series-cascaded ring resonators were 12.2 nm, 0.134 nm, 4100 nm/RIU, and 11580, respectively, and the measurement range was calculated to be slightly smaller than 3×10-3 RIU. Although the measurement range was smaller than that of the single ring resonator, upon considering other characteristic parameters, the series-cascaded ring resonators are found to be more effective as integrated sensors than single ring resonators.

A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit

  • Mohd. Ali, Jagabar Sathik;Kannan, Ramani
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.951-963
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    • 2015
  • In this paper, a new symmetric multilevel inverter is proposed. A simple structure for the cascaded multilevel inverter topology is also proposed, which produces a high number of levels with the application of few power electronic devices. The symmetric multilevel inverter can generate 2n+1 levels with a reduced number of power switches. The basic unit is composed of a single and double source unit (SDS-unit). The application of this SDS-unit is for reducing the number of power electronic components like insulated gate bipolar transistors, freewheeling diodes, gate driver circuits, dc voltage sources, and blocked voltages by switches. Various new algorithms are recommended to determine the magnitude of dc sources in a cascaded structure. Furthermore, the proposed topology is optimized for different goals. The proposed cascaded structure is compared with other similar topologies. For verifying the performance of the proposed basic symmetric and cascaded structure, results from a computer-based MATLAB/Simulink simulation and from experimental hardware are also discussed.

종속 접속된 전압제한형 SPD의 직격뢰 서지전류에 대한 에너지협조 (Energy Coordination between Cascaded Voltage Limiting Type SPDs in Surge Currents due to Direct Lightning Flashes)

  • 이복희;엄상현
    • 조명전기설비학회논문지
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    • 제28권5호
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    • pp.68-75
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    • 2014
  • Cascaded applications of surge protective devices(SPDs) are required in order to reduce the stress on the electrical and electronics equipment being protected, and the energy coordination between the cascaded SPDs is very important. This paper deals with the experimental results obtained from the installation conditions of full-scale SPDs. The energy coordination between the upstream Class I SPD and the downstream Class II SPD was measured using a $10/350{\mu}s$ impulse current due to direct lightning flashes. The distances between the cascaded SPDs were 3, 10, and 50m, and the maximum test current was 12.5kA. As a result, the energy sharing between cascaded SPDs was dependent on the voltage protection level of each SPD and the distance between two SPDs. An overview of how to select SPD ratings in applications of cascaded SPDs system was discussed based on the energy coordination between the two SPDs. The proposed test results for the energy coordination between two-stage cascaded SPDs can be used in effective applications of SPDs.

Transformerless Cascaded AC-DC-AC Converter for Multiphase Propulsion Drive Application

  • Tao, Xing-Hua;Xu, Lie;Song, Yi-Chao;Sun, Min
    • Journal of international Conference on Electrical Machines and Systems
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    • 제1권3호
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    • pp.354-359
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    • 2012
  • A transformerless converter suitable for multiphase drive application is presented in this paper. The topology employs a cascaded H-bridge rectifier as the interface between the grid and multi inverters which drive the multiphase motor. Compared with the conventional structure, the new topology eliminates the input transformer and also has the advantages such as four quadrant operation, simple configuration, low cost, high efficiency, and so on. The control strategies for the grid-side cascade H-bridge rectifier and the motor-side inverter are studied accordingly. Based on the multi-rotational reference frame, modular control scheme is developed to regulate the multiphase drive system. Simulation results show the proper operation of the proposed topology and the corresponding control strategy.

3차 진동모드를 이용한 종속 연결된 고주파 필터 특성에 미치는 결합 캐패시턴스의 영향 (Effects of Coupling Capacitance on the Characteristics of Cascaded High Frequency Filter using 3rd Overtone Vibration Mode)

  • 류주현;오동언
    • 한국전기전자재료학회논문지
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    • 제16권10호
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    • pp.887-891
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    • 2003
  • In this paper, two filters with center frequency of 19.58MHz were cascaded and its bandwidth characteristics were investigated with the variations of coupling capacitance for intermediate frequency (IF) bandpass filter application. The cascaded filter showed the higher stop region, reduction of spurious response and increase of selectivity. With the increase of coupling capacitance, insertion loss was increased but spurious response reduced. The cascaded filter with coupling capacitance of 15pF showed insertion loss of 5.643dB, 3dB bandwidth of 55.089kHz and 20dB bandwidth of 83.608kHz, respectively.

비휘발성 메모리 시스템을 위한 저전력 연쇄 캐시 구조 및 최적화된 캐시 교체 정책에 대한 연구 (A Study on Design and Cache Replacement Policy for Cascaded Cache Based on Non-Volatile Memories)

  • 최주희
    • 반도체디스플레이기술학회지
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    • 제22권3호
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    • pp.106-111
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    • 2023
  • The importance of load-to-use latency has been highlighted as state-of-the-art computing cores adopt deep pipelines and high clock frequencies. The cascaded cache was recently proposed to reduce the access cycle of the L1 cache by utilizing differences in latencies among banks of the cache structure. However, this study assumes the cache is comprised of SRAM, making it unsuitable for direct application to non-volatile memory-based systems. This paper proposes a novel mechanism and structure for lowering dynamic energy consumption. It inserts monitoring logic to keep track of swap operations and write counts. If the ratio of swap operations to total write counts surpasses a set threshold, the cache controller skips the swap of cache blocks, which leads to reducing write operations. To validate this approach, experiments are conducted on the non-volatile memory-based cascaded cache. The results show a reduction in write operations by an average of 16.7% with a negligible increase in latencies.

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A Novel DC Bus Voltage Balancing of Cascaded H-Bridge Converters in D-SSSC Application

  • Saradarzadeh, Mehdi;Farhangi, Shahrokh;Schanen, Jean-Luc;Frey, David;Jeannin, Pierre-Olivier
    • Journal of Power Electronics
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    • 제12권4호
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    • pp.567-577
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    • 2012
  • This paper introduces a new scheme to balance the DC bus voltages of a cascaded H-bridge converter which is used as a Distribution Static Synchronous Series Compensator (D-SSSC) in electrical distribution network. The aim of D-SSSC is to control the power flow between two feeders from different substations. As a result of different cell losses and capacitors tolerance the cells DC bus voltage can deviate from their reference values. In the proposed scheme, by individually modifying the reference PWM signal for each cell, an effective balancing procedure is derived. The new balancing procedure needs only the line current sign and is independent of the main control strategy, which controls the total DC bus voltages of cascaded H-bridge. The effect of modulation index variation on the capacitor voltage is analytically derived for the proposed strategy. The proposed method takes advantages of phase shift carrier based modulation and can be applied for a cascaded H-bridge with any number of cells. Also the system is immune to loss of one cell and the presented procedure can keep balancing between the remaining cells. Simulation studies and experimental results validate the effectiveness of the proposed method in the balancing of DC bus voltages.

Cascaded H-Bridge Five Level Inverter for Grid Connected PV System using PID Controller

  • Sivagamasundari, M.S.;Mary, P. Melba
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.451-462
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    • 2016
  • Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

Analysis of Cascaded H-Bridge Multilevel Inverter in DTC-SVM Induction Motor Drive for FCEV

  • Gholinezhad, Javad;Noroozian, Reza
    • Journal of Electrical Engineering and Technology
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    • 제8권2호
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    • pp.304-315
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    • 2013
  • In this paper, analysis of cascaded H-bridge multilevel inverter in DTC-SVM (Direct Torque Control-Space Vector Modulation) based induction motor drive for FCEV (Fuel Cell Electric Vehicle) is presented. Cascaded H-bridge multilevel inverter uses multiple series units of H-bridge power cells to achieve medium-voltage operation and low harmonic distortion. In FCEV, a fuel cell stack is used as the major source of electric power moreover the battery and/or ultra-capacitor is used to assist the fuel cell. These sources are suitable for utilizing in cascaded H-bridge multilevel inverter. The drive control strategy is based on DTC-SVM technique. In this scheme, first, stator voltage vector is calculated and then realized by SVM method. Contribution of multilevel inverter to the DTC-SVM scheme is led to achieve high performance motor drive. Simulations are carried out in Matlab-Simulink. Five-level and nine-level inverters are applied in 3hp FCEV induction motor drive for analysis the multilevel inverter. Each H-bridge is implemented using one fuel cell and battery. Good dynamic control and low ripple in the torque and the flux as well as distortion decrease in voltage and current profiles, demonstrate the great performance of multilevel inverter in DTC-SVM induction motor drive for vehicle application.

Application passband filter of multiply cascaded phase-shifted long-period fiber gratings

  • Kim, Min-Sung;Han, Young-Geun;Kang, Dong-Joong;Ha, Jong-Eun;Kim, Jin-Young;Lho, Tae-Jung
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.2496-2498
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    • 2005
  • The transmission characteristics of multiply cascaded phase-shifted long-period fiber gratings (LPFGs) will be investigated theoretically and experimentally. Their passband can be changed by increasing the number of ${\pi}$ -shifted LPFGs. When two ${\pi}$ -shifted LPFGs with different grating lengths are cascaded in series, the bandwidth of the rejection band and passband can be controlled by the pristine characteristics of two gratings.

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