• 제목/요약/키워드: Capacitor Structure

검색결과 530건 처리시간 0.023초

Ferroelectric 캐패시터의 하부전극에의 응용을 위한 IrO2 박막 증착 및 특성분석 (Growth and Characteristics of IrO2 Thin Films for Application as Bottom Electrodes of Ferroelectric Capacitors)

  • 허재성;최훈상;김도영;장유민;이장혁;최인훈
    • 한국재료학회지
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    • 제13권2호
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    • pp.69-73
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    • 2003
  • In this work, $IrO_2$thin films as bottom electrode of ferroelectric capacitors were deposited and characterized. The $IrO_2$films deposited in the conditions of 25, 40 and 50% oxygen ambient by sputtering method were annealed at 600, 700 and $800^{\circ}C$, respectively. It was found that the crystallinity and the surface morphology of $IrO_2$films affected the surface properties and electrical properties of SBT thin films prepared by the MOD method. With increasing temperature, the crystallinity and the roughness of $IrO_2$films were also increasing. This increasing of roughness degraded the surface properties and electrical properties of SBT films. We found an optimum condition of $IrO_2$films as bottom electrode for ferroelectric capacitor at 50% oxygen ambient and $600^{\circ}C$ annealing temperature. Electrical characterizations were performed by using$ IrO_2$bottom electrodes grown at an optimum conditions. The remanent polarization ($P_{r}$) of the Pt/SBT/$IrO_2$/$SiO_2$/Si structure was 2.75 $\mu$C/$\textrm{cm}^2$ at an applied voltage of 3 V. The leakage current density was $1.06${\times}$10^{-3}$ A/$\textrm{cm}^2$ at an applied voltage of 3 V.

접촉연소식 센서의 열 특성 및 가스반응의 모델링 (Electrical modelling for thermal behavior and gas response of combustible catalytic sensor)

  • 이상문;송갑득;주병수;이윤수;이덕동
    • 센서학회지
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    • 제15권1호
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    • pp.34-39
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    • 2006
  • This study provides the electrical model of combustible catalytic gas sensor. Physical characteristics such as thermal behavior, resistance change were included in this model. The finite element method analysis for sensor device structure showed that the thermal behavior of sensor is expressed in a simple electrical equivalent circuit that consists of a resistor, a capacitor and a current source. This thermal equivalent circuit interfaces with real electrical circuit using two parts. One is 'power to heat' converter. The other is temperature dependent variable resistor. These parts realized with the analog behavior devices of the SPICE library. The gas response tendency was represented from the mass transferring limitation theory and the combustion theory. In this model, Gas concentration that is expressed in voltage at the model, is converted to heat and is flowed to the thermal equivalent circuit. This model is tested in several circuit simulations. The resistance change of device, the delay time due to thermal capacity, the gas responses output voltage that are calculated from SPICE simulations correspond well to real results from measuring in electrical circuits. Also good simulation result can be produced in the more complicated circuit that includes amplifier, bios circiut, buffer part.

Scanning Probe Microscopy를 이용한 국소영역에서의 실리콘 나노크리스탈의 전기적 특성 분석 (Characterization of Electrical Properties of Si Nanocrystals Embedded in a SiO$_{2}$ Layer by Scanning Probe Microscopy)

  • 김정민;허현정;강치중;김용상
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제54권10호
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    • pp.438-442
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    • 2005
  • Si nanocrystal (Si NC) memory device has several advantages such as better retention, lower operating voltage, reduced punch-through and consequently a smaller cell area, suppressed leakage current. However, the physical and electrical reasons for this behavior are not completely understood but could be related to interface states of Si NCs. In order to find out this effect, we characterized electrical properties of Si NCs embedded in a SiO$_{2}$ layer by scanning probe microscopy (SPM). The Si NCs were generated by the laser ablation method with compressed Si powder and followed by a sharpening oxidation. In this step Si NCs are capped with a thin oxide layer with the thickness of 1$\~$2 nm for isolation and the size control. The size of 51 NCs is in the range of 10$\~$50 m and the density around 10$^{11}$/cm$^{2}$ It also affects the interface states of Si NCs, resulting in the change of electrical properties. Using a conducting tip, the charge was injected directly into each Si NC, and the image contrast change and dC/dV curve shift due to the trapped charges were monitored. The results were compared with C-V characteristics of the conventional MOS capacitor structure.

Performance of Electric Double Layers Capacitor Using Activated Carbon Materials from Rice Husk as Electrodes

  • Nguyen, Tuan Dung;Ryu, Jae Kyung;Bramhe, Sachin N.;Kim, Taik-Nam
    • 한국재료학회지
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    • 제23권11호
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    • pp.643-648
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    • 2013
  • Activated carbon (AC) was synthesized from rice husks using the chemical activation method with KOH, NaOH, a combination of (NaOH + $Na_2CO_3$), and a combination of (KOH + $K_2CO_3$) as the chemical activating reagents. The activated carbon with the highest surface area (around $2000m^2/g$) and high porosity, which allows the absorption of a large number of ions, was applied as electrode material in electric double layer capacitors (EDLCs). The AC for EDLC electrodes is required to have a high surface area and an optimal pore size distribution; these are important to attain high specific capacitance of the EDLC electrodes. The electrodes were fabricated by compounding the rice husk activated carbons with super-P and mixed with polyvinylidene difluoride (PVDF) at a weight ratio of 83:10:7. AC electrodes and nickel foams were assembled with potassium hydroxide (KOH) solution as the electrolyte. Electrochemical measurements were carried out with a three electrode cell using 6 M KOH as electrolyte and Hg/HgO as the reference electrode. The specific capacitance strongly depends on the pore structure; the highest specific capacitance was 179 F/g, obtained for the AC with the highest specific surface area. Additionally, different activation times, levels of heating, and chemical reagents were used to compare and determine the optimal parameters for obtaining high surface area of the activated carbon.

Composite Righg/Left-Hand 전송선로를 이용한 새로운 이중대역의 CPW 윌킨슨 전력 분배기 (A New CPW Dual Band Wilkinson Power Divider Using Composite Right/Left-Handed Transmission Line)

  • 장조복;왕양;윤기철;이종철
    • 한국ITS학회 논문지
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    • 제14권6호
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    • pp.117-124
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    • 2015
  • 본 논문에서는 새로운 기법의 광대역 저손실 CRLH(composit right/left handed) 전송선로와 윌킨슨 전력 분배기에 대해 제안한다. 전송선로는 평형 미엔더 인덕터와 직렬 캐패시터로 구성된 coplanar 도파관 (CPW)으로 구성되며, 전력 분배기는 CRLH 전송선로를 일반 전송선로 부분에 대체하여 설계를 한다. 실험 결과 동작 주파수 대역 8.4 GHz 에서 30.0 GHz내에서 반사손실은 12 dB 이하로써 비교적 만족한 결과를 얻었다. 전력 분배기의 주파수는 12.05에서 13.15 GHz 그리고 16.50에서 19.30 GHz 로써 대역폭은 20 dB 기준으로 8.9 % 및 17.9 % 이며 이는 측정결과와 시뮬레이션 결과와 비교를 하였을 때 상당히 일치하는 것을 알 수 있다.

카디악 페이스메이커용 0.8V 816nW 델타-시그마 모듈레이터 (A 0.8V 816nW Delta-Sigma Modulator Applicaiton for Cardiac Pacemaker)

  • 이현태;허동훈;노정진
    • 대한전자공학회논문지SD
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    • 제45권1호
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    • pp.28-36
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    • 2008
  • 이번 논문은 implantable cardiac 페이스메이커의 검출 단 로서 저전압, 저전력 단일-비트 삼차 델타-시그마 모듈레이터를 구현하였다. 1V이하의 전원 전압에서 효과적으로 동작하기 위하여 distributed feedforward구조와 벌크-드리븐 OTA를 활용하였다. 설계된 모듈레이터는 0.8V의 전원 전압에서 49dB의 dynamic range를 가지면서 816nW의 파워를 소모하였다. 파워 소모를 획기적으로 줄임으로서 페이스메이커뿐만 아니라 제한된 배터리에서 동작하는 implantable 의료 기기에서 다양한 활용이 가능할 것으로 생각된다. 본 모듈레이터의 칩 크기는 $1000{\mu}m{\times}500{\mu}m$로서 $0.18{\mu}m$ CMOS standard 공정으로 제작되었다.

격리구조 기법을 이용한 안테나 격리도 변화 분석 (Analysis of Antenna Isolation Using Decoupling Structure)

  • 이정훈;김지훈;김민기;김형훈;김형동
    • 한국전자파학회논문지
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    • 제26권12호
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    • pp.1044-1049
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    • 2015
  • 본 논문에서는 격리도 향상 공진기(isolating resonator)를 사용하여 격리도를 향상시킨 안테나를 제안하였다. Wi-Fi 주파수(2.4~2.5 GHz) 대역에서 동작하는 두 개의 루프 안테나는 그라운드의 센터를 중심으로 대칭으로 설계되었고, 이격거리가 매우 가깝다. Wi-Fi 주파수 대역에서의 격리도 저하 특성을 개선하기 위해 두 안테나 사이에 격리도 향상 공진기를 삽입하였다. 제안된 격리도 향상 공진기는 슬롯타입 구조로 공진기의 사이즈 조절을 통해 격리도 특성을 향상시키고, 삽입된 커패시터($C_D$)를 통해 공진기의 공진 주파수를 이동시킴으로써 목표 주파수에서의 격리도 특성을 쉽게 향상시킬 수 있다.

두 개의 이중 모드 공진기를 이용한 소형 이중 대역 통과 필터 (Compact Dual-Band Bandpass Filter Using Two Dual-Mode Resonators)

  • 김경근;이자현;임영석
    • 한국전자파학회논문지
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    • 제21권12호
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    • pp.1447-1453
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    • 2010
  • 본 논문에서는 두 개의 이중 모드 공진기를 이용하여 이중 대역 통과 필터를 구현하였다. 단락 스터브를 이용한 이중 모드 공진기는 inter-digital 커패시터와 계단형 임피던스를 이용하여 소형화 되었다. 두 개의 이중 모드 공진기는 각 통과 대역의 중심 주파수에서 동작하도록 설계되었다. 전송 영점이 통과 대역의 상측이나 하측에 위치하여 차단 특성을 향상시킬 수 있다. 이중 대역 동작을 위해 이중 급전 구조를 이용하였다. 제안된 구조는 WLAN 대역인 2.45/5.25 GHz에서 동작하도록 설계 제작되었다. 제안된 이중 대역 통과 필터의 크기는 $10.83\;mm{\times}5.3\;mm$이다.

태양광 발전 PCS 구성부품에 대한 열적특성 및 고장모드영향분석 (Thermal Characteristic and Failure Modes and Effects Analysis for Components of Photovoltaic PCS)

  • 김두현;김성철;김윤복
    • 한국안전학회지
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    • 제33권4호
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    • pp.1-7
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    • 2018
  • This paper is analyzed for the thermal characteristics(1 year) of the 6 components(DC breaker, DC filter(including capacitor and discharge resistance), IGBT(Insulated gate bipolar mode transistor), AC filter, AC breaker, etc.) of a photovoltaic power generation-based PCS(Power conditioning system) below 20 kW. Among the modules, the discharge resistance included in the DC filter indicated the highest heat at $125^{\circ}C$, and such heat resulting from the discharge resistance had an influence on the IGBT installed on the rear side the board. Therefore, risk priority through risk priority number(RPN) of FMEA(Failure modes and effects analysis) sheet is conducted for classification into top 10 %. According to thermal characteristics and FMEA, it is necessary to pay attention to not only the in-house defects found in the IGBT, but also the conductive heat caused by the discharge resistance. Since it is possible that animal, dust and others can be accumulated within the PCS, it is possible that the heat resulting from the discharge resistance may cause fire. Accordingly, there are two options that can be used: installing a heat sink while designing the discharge resistance, and designing the discharge resistance in a structure capable of avoiding heat conduction through setting a separation distance between discharge resistance and IGBT. This data can be used as the data for conducting a comparative analysis of abnormal signals in the process of developing a safety device for solar electricity-based photovoltaic power generation systems, as the data for examining the fire accidents caused by each module, and as the field data for setting component management priorities.

비휘발성 메모리를 위한 SiO2와 Si3N4가 대칭적으로 적층된 터널링 절연막의 전기적 특성과 열처리를 통한 특성 개선효과 (Improved Electrical Characteristics of Symmetrical Tunneling Dielectrics Stacked with SiO2 and Si3N4 Layers by Annealing Processes for Non-volatile Memory Applications)

  • 김민수;정명호;김관수;박군호;정종완;정홍배;이영희;조원주
    • 한국전기전자재료학회논문지
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    • 제22권5호
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    • pp.386-389
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    • 2009
  • The electrical characteristics and annealing effects of tunneling dielectrics stacked with $SiO_2$ and $Si_{3}N_{4}$ were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_{3}N_{4}/SiO_2/Si_{3}N_{4}$ (NON), $SiO_2/Si_{3}N_{4}/SiO_2$ (ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS (metal-oxide-semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field. Furthermore, the increased tunneling current through engineered tunneling barriers related to high speed operation can be achieved by annealing processes.