• Journal of Power Electronics
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• v.12 no.1
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• pp.193-200
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• 2012

Previous publications regarding the design and specifications of the interface inductor and the DC side capacitor for a STATCOM usually deal with the interface inductor and the DC side capacitor only. They seldom pay attention to the influences of the interface inductor and capacitor on the performance of a STATCOM system. In this paper a detailed analysis of influence of the interface inductor and the DC side capacitor on a STATCOM system and the corresponding design considerations is presented. Phase and amplitude control is considered as the control strategy for the STATCOM. First, a model of a STATCOM system is carried out. Second, through frequency domain methods, such as transfer functions and Bode plots, the influence of the interface inductor and the DC side capacitor on the stability and filtering characteristics of the STATCOM are extensively investigated. Third, according to this analysis, the design considerations based on the phase margin for the interface inductor and the DC side capacitor are discussed, which leads to parameters that are different from those of the traditional design.

• Journal of Power Electronics
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• v.10 no.1
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• pp.27-33
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• 2010

This paper presents a bidirectional DC-DC converter suitable for low-voltage super capacitor-based electric energy storage systems. The DC-DC converter presented here consists of a full-bridge circuit and a current-fed push-pull circuit with a high frequency (HF) transformer-link. In order to reduce the device-conduction losses due to the large current of the super capacitor as well as unnecessary ringing, synchronous rectification is employed in the super capacitor-charging mode. A wide range of voltage regulation between the battery and the super capacitor can be realized by employing a Phase-Shifting (PS) Pulse Width Modulation (PWM) scheme in the full-bridge circuit for the super capacitor charging mode as well as the overlapping PWM scheme of the gate signals to the active power devices in the push-pull circuit for the super capacitor discharging mode. Essential performance of the bidirectional DC-DC converter is demonstrated with simulation and experiment results, and the practical effectiveness of the DC-DC converter is discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.11-12
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• 2008

최근 LSI speed의 고속화에 따라, SSN (Simultaneous Switching Noise)이 매우 큰 문제가 되고 있다. 이에 PDN에 대한 많은 해결책들이 제시되고 있으나 가장 저비용 고효율을 지향할 수 있는 방법이 현재 사용되고 있는 유기기판에 Capacitor를 내장하여 로 사용하는 방법이다. Decoupling capacitor를 두께가 밟은 유기기판에 구현하기 위해서는 유전율이 큰 물질을 사용하는 것이 좋은데 본 연구에서는 $BaTiO_3$를 epoxy 에 혼합하여 10um 두께의 필름으로 제작한 후 유기기판 제조 공정에 사용하여 유기기판을 구현하였다. 이렇게 구현된 capacitor 내장 유기기판을 2 stub의 간단한 회로를 구현하여 유전율 등을 측정하였으며, 고주파 전산모사를 통하여 capacitor의 용량 변화에 따른 고주파 특성의 변화를 연구하였다.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.5
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• pp.453-460
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• 2012

This paper proposes the method to design the parameters of an impedance network at three-phase QZSI(quasi Z-source inverter) by considering an equivalent series resistance (ESR) in the capacitor. The equations of both two capacitor voltages and two inductor currents are derived at three operating modes of the QZSI. The capacitor voltage ripples caused by the ESR in the capacitor at the transition state of operating modes are calculated. Based on the ripples of both the capacitor voltages and inductor currents, the optimal values of capacitor and inductor are designed. The simulation studies using PSIM and experimental results with DSP are carried out to verify the performance of design method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.12
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• pp.1133-1138
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• 2005

In this study, we have prepared, as the pluse power source, a commercially supplied Li-ion battery with a capacity of 700 mAh and AC resistivity of 60 md at 1 kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected hybrid capacitor/Li-ion battery source. The nonaqueous asymmetric hybrid capacitors constituted with each stack number of pairs composed of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The 10 stacked hybrid capacitor, which was charged and discharged at a constant current at 0.25 $mA/cm^2$ between 3 and 4.3 V, has exhibited the capacitance of 108F and the lowest equivalent series resistance was 32 $m{\Omega}$ at 1 kHz. On the other hand, the enhanced run time of Li-ion battery assisted by the hybrid capacitor was obtained with increasing of current density and pulse width in Pulse mode. The best improvement, $84\;\%$ for hybrid capacitor/Li-ion battery was obtained in the condition of a 7C-rate pulse (100 msec)/0.5C-rate standby/$10\;\%$ duty cycle.

• Journal of the Korean Electrochemical Society
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• v.3 no.4
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• pp.241-245
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• 2000

The objective of this work Is to design, fabricate, and characterize pseudo-capacitor using amorphous $MnO_2\;nH_2O$ electrode material. The cyclic voltammogram under 100mV/s scan rate of the material shows the electrochemically stable potential window of 1V and the specific capacitance of 250F/g. The TDMA pulse test result indicates that the TDMA system (2 parallel-pseudo-capacitor systems) has the ohmic voltage drop of 0.22V and the capacitor voltage drop of 0.38V. The total voltage drop of the TDMA system is 0.60V and less than 1V of which value is the maximum voltage drop requirement or the TDMA satellite phone. Also, the TDMA system had the ESR of $55m{\Omega}$ and the capacitance of 105mF. Therefore, it is confirmed that the TDMA system has the application feasibility as load-leveling capacitor for the satellite phone.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.597-598
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• 2005

Recently, the performance of portable electric equipment can often improved by a Li-ion battery assisted by a supercapacitor. A supercapacitor can provide high power density as well as a low resistance in the hybrid system. In this study, we have prepared, as the pluse power souce, a commercially supplied Li-ion battery with a capacity of 700mAh and AC resistivity of $60m\Omega$ at 1kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected battery/hybrid capacitor source. The nonaqueous asymmetric hybrid capacitor, the stacks of 10 pairs of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The hybrid capacitor, which was charged and discharged at a constant current at $0.25mA/cm^2$ between 3 and 4.3V, has exhibited the capacitance of 100F. And the equivalent series resistance was $32m\Omega$ at 1kHz. By combining a Li-ion battery and a hybrid capacitor, the pulse performance of battery can be improved 23% in run time under a pulse discharge of 7C-rate.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.4
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• pp.117-122
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• 2018

A large-capacity three-phase system air conditioner recently includes an inverter circuit to reduce power consumption. The inverter circuit uses a DC voltage that comes from DC-link power capacitor with the function of rectifying, which means AC voltage to DC voltage using a diode. An electrolytic capacitor is generally used to satisfy the voltage ripple and current ripple conditions of a DC-link power capacitor used for rectifying. Reducing the capacitance of the capacitor decreases the size, weight, and cost of the circuit. This paper proposes an algorithm to reduce the input ripple current by combining the minimum point estimation phase locked loop (PLL) phase control and the average voltage d axis current control technique. When this algorithm was used, the input ripple current decreased by almost 90%. The current ripple of the DC-link capacitor decreased due to the decrease in input ripple current. The capacitor capacity can be reduced but the electrolytic capacitor has a heat generation problem and life-time limitations because of its large equivalent series resistance (ESR). This paper proposes a method to select a film capacitor considering the current ripple at DC-link stage instead of an electrolytic capacitor. The capacitance was selected considering the voltage limitation, RMS (Root Mean Square) current capacity, and RMS current frequency analysis. A $1680{\mu}F$ electrolytic capacitor can be reduced to a $20{\mu}F$ film capacitor, which has the benefit of size, weight and cost. These results were verified by motor operation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.387-400
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• 2017

A new junction-splitting based SAR ADC with a redundant searching capacitor array structure in $0.13{\mu}m$ CMOS process to alleviate capacitor mismatch effects, is presented. The normalized average power has a factor of 0.35 to the conventional SAR ADC at 10-bit conversion accuracy. Statistical experiments show the number of missing codes resulting from the mismatch reduces by 95% for 3% unit-capacitor mismatch ratio, while keeping the conversion energy to that of the conventional JS capacitor array.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.18-18
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• 2009

본 논문은 X8R 온도 특성을 가지는 유전체 원료를 이용하여 고용량이면서 고압화가 가능한 적층 칩 캐패시터를 제작하였다. 대형 고압용 적층 칩 캐패시터를 위한 내부 전극 설계 및 외부 전극 형성 방법에 대한 연구도 함께 진행하였다. 적층 칩 캐패시터를 하이브리드 자동차 및 산업용 인버터의 DC-Link으로 사용하기 적합한 모듈을 제작하였으며 모듈 설계시 고유전율의 에폭시-세라믹 필름을 하였다. 본 모듈을 평가한 결과 기존 캐패시터 모듈에 비하여 2/3 크기의 소형화를 얻을 수 있었으며 ripple 전류 및 발열 특성이 매우 우수함을 확인하였다.