• Title/Summary/Keyword: Capacitive readout circuit

Search Result 13, Processing Time 0.02 seconds

Design of Low Noise Readout Circuit for 2-D Capacitive Microbolometer FPAs (정전용량 방식의 이차원 마이크로볼로미터 FPA를 위한 저잡음 신호취득 회로 설계)

  • Kim, Jong Eun;Woo, Doo Hyung
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.51 no.10
    • /
    • pp.80-86
    • /
    • 2014
  • A low-noise readout circuit is studied for 2-D capacitive microbolometer focal plane arrays (FPAs). In spite of the merits of the integration method, a simple and effective pixelwise readout circuit without integration is used for input circuit because of a small pixel size and narrow noise bandwidth. To reduce the power consumption and the kT/C noise, which is the dominant noise of the capacitive microbolometer FPAs with small capacitance, a new correlated double sampling (CDS) is used for columnwise circuit. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed circuit effectively reduces the kT/C noise and the other low-frequency noise of microbolometer, and the noise characteristics of the fabricated chip have been verified by measurements. The rms noise voltage of the proposed circuit is reduced from 30 % to 55 % compared to that of the simple readout input circuit, and the noise equivalent temperature difference (NETD) of the proposed circuit is very low value of 21.5 mK.

Capacitive Readout Circuit for Tri-axes Microaccelerometer with Sub-fF Offset Calibration

  • Ouh, Hyun Kyu;Choi, Jungryoul;Lee, Jungwoo;Han, Sangyun;Kim, Sungwook;Seo, Jindeok;Lim, Kyomuk;Seok, Changho;Lim, Seunghyun;Kim, Hyunho;Ko, Hyoungho
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.14 no.1
    • /
    • pp.83-91
    • /
    • 2014
  • This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a charge-storing capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous offset cancelling circuit using series-connected capacitor arrays. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and $230{\mu}A$, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are $349{\mu}g$/${\sqrt}$Hz, $341{\mu}g$/${\sqrt}$Hz and $411{\mu}g$/${\sqrt}$Hz, respectively.

A Digital Readout IC with Digital Offset Canceller for Capacitive Sensors

  • Lim, Dong-Hyuk;Lee, Sang-Yoon;Choi, Woo-Seok;Park, Jun-Eun;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.12 no.3
    • /
    • pp.278-285
    • /
    • 2012
  • A digital readout IC for capacitive sensors is presented. Digital capacitance readout circuits suffer from static capacitance of sensors, especially single-ended sensors, and require large passive elements to cancel such DC offset signal. For this reason, to maximize a dynamic range with a small die area, the proposed circuit features digital filters having a coarse and fine compensation steps. Moreover, by employing switched-capacitor circuit for the front-end, correlated double sampling (CDS) technique can be adopted to minimize low-frequency device noise. The proposed circuit targeted 8-kHz signal bandwidth and oversampling ratio (OSR) of 64, thus a $3^{rd}$-order ${\Delta}{\Sigma}$ modulator operating at 1 MH was used for pulse-density-modulated (PDM) output. The proposed IC was designed in a 0.18-${\mu}m$ CMOS mixed-mode process, and occupied $0.86{\times}1.33mm^2$. The measurement results shows suppressed DC power under about -30 dBFS with minimized device flicker noise.

A Compact Low-Power Shunt Proximity Touch Sensor and Readout for Haptic Function

  • Lee, Yong-Min;Lee, Kye-Shin;Jeong, Taikyeong
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.3
    • /
    • pp.380-386
    • /
    • 2016
  • This paper presents a compact and low-power on-chip touch sensor and readout circuit using shunt proximity touch sensor and its design scheme. In the proposed touch sensor readout circuit, the touch panel condition depending on the proximity of the finger is directly converted into the corresponding voltage level without additional signal conditioning procedures. Furthermore, the additional circuitry including the comparator and the flip-flop does not consume any static current, which leads to a low-power design scheme. A new prototype touch sensor readout integrated circuit was fabricated using complementally metal oxide silicon (CMOS) $0.18{\mu}m$ technology with core area of $0.032mm^2$ and total current of $125{\mu}A$. Our measurement result shows that an actual 10.4 inches capacitive type touch screen panel (TSP) can detect the finger size from 0 to 1.52 mm, sharply.

A Multi-purpose Fingerprint Readout Circuit Embedding Physiological Signal Detection

  • Eom, Won-Jin;Kim, Sung-Woo;Park, Kyeonghwan;Bien, Franklin;Kim, Jae Joon
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.6
    • /
    • pp.793-799
    • /
    • 2016
  • A multi-purpose sensor interface that provides dual-mode operation of fingerprint sensing and physiological signal detection is presented. The dual-mode sensing capability is achieved by utilizing inter-pixel shielding patterns as capacitive amplifier's input electrodes. A prototype readout circuit including a fingerprint panel for feasibility verification was fabricated in a $0.18{\mu}m$ CMOS process. A single-channel readout circuit was implemented and multiplexed to scan two-dimensional fingerprint pixels, where adaptive calibration capability against pixel-capacitance variations was also implemented. Feasibility of the proposed multi-purpose interface was experimentally verified keeping low-power consumption less than 1.9 mW under a 3.3 V supply.

1.5 V Sub-mW CMOS Interface Circuit for Capacitive Sensor Applications in Ubiquitous Sensor Networks

  • Lee, Sung-Sik;Lee, Ah-Ra;Je, Chang-Han;Lee, Myung-Lae;Hwang, Gunn;Choi, Chang-Auck
    • ETRI Journal
    • /
    • v.30 no.5
    • /
    • pp.644-652
    • /
    • 2008
  • In this paper, a low-power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35-${\mu}m$ CMOS logic technology. To achieve low-power performance, the low-voltage capacitance-to-pulse-width converter based on a self-reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self-reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra-low power dissipation of 157 ${\mu}W$ of the interface-circuit core. These results demonstrate that the new interface circuit with self-reset operation successfully reduces power consumption. In addition, a prototype wireless sensor-module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low-power performance is essential.

  • PDF

A Polymer-based Capacitive Air Flow Sensor with a Readout IC and a Temperature Sensor

  • Kim, Wonhyo;Lee, Hyugman;Lee, Kook-Nyeong;Kim, Kunnyun
    • Journal of Sensor Science and Technology
    • /
    • v.28 no.1
    • /
    • pp.1-6
    • /
    • 2019
  • This paper presents an air flow sensor (AFS) based on a polymer thin film. This AFS primarily consists of a polymer membrane attached to a metal-patterned glass substrate and a temperature-sensing element composed of NiCr. These two components were integrated on a single glass substrate. The AFS measures changes in capacitance caused by deformation of the polymer membrane based on the air flow and simultaneously detects the temperature of the surrounding environment. A readout integrated circuit (ROIC) was also fabricated for signal processing, and an ROIC chip, 1.8 mm by 1.9 mm in size, was packaged with an AFS in the form of a system-in-package module. The total size of the AFS is 1 by 1 cm, and the diameter and thickness of the circular-shaped polymer membrane are 4 mm and $15{\mu}m$, respectively. The rate of change of the capacitance is approximately 11.2% for air flows ranging between 0 and 40 m/s.

Advancements in Capacitive Touch System and Stylus Technologies

  • Ha-Min Lee;Seung-Hoon Ko
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.37 no.5
    • /
    • pp.465-475
    • /
    • 2024
  • Due to changes in the form factor of display panels and touch screen panels in various devices, capacitive touch systems have evolved to address various issues such as low power consumption, noise immunity, and small chip size. Furthermore, some devices have applications that use a stylus. Since the stylus operates similarly to a finger touch, it encounters similar issues. Recent research trends focus on addressing key issues such as noise, which is primarily caused by the self-capacitor formed between the display cathode and the touch screen panel. In this paper, Various research papers discussing methods to eliminate external noise will be reviewed. These advancements enhance noise immunity in touch systems, making it easier to use thinner and more flexible panels. These progress make touch technology more versatile and reliable in various applications.

Recent Research Trends in Touchscreen Readout Systems (최근 터치스크린 Readout 시스템의 연구 경향)

  • Jun-Min Lee;Ju-Won Ham;Woo-Seok Jang;Ha-Min Lee;Sang-Mo Koo;Jong-Min Oh;Seung-Hoon Ko
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.36 no.5
    • /
    • pp.423-432
    • /
    • 2023
  • With the increasing demand for mobile devices featuring multi-touch operation, extensive research is being conducted on touch screen panel (TSP) Readout ICs (ROICs) that should possess low power consumption, compact chip size, and immunity to external noise. Therefore, this paper discusses capacitive touch sensors and their readout circuits, and it introduces research trends in various circuit designs that are robust against external noise sources. The recent state-of-the-art TSP ROICs have primarily focused on minimizing the impact of parasitic capacitance (Cp) caused by thin panel thickness. The large Cp can be effectively compensated using an area-efficient current compensator and Current Conveyor (CC), while a display noise reduction scheme utilizing a noise-antenna (NA) electrode significantly improves the signal-to-noise ratio (SNR). Based on these achievements, it is expected that future TSP ROICs will be capable of stable operation with thinner and flexible Touch Screen Panels (TSPs).

Design of Compensated Digital Interface Circuits for Capacitive Pressure Sensor (용량형 압력센서용 디지탈 보상 인터페이스 회로설계)

  • Lee, Youn-Hee;Sawada, Kouji;Seo, Hee-Don;Choi, Se-Gon
    • Journal of Sensor Science and Technology
    • /
    • v.5 no.5
    • /
    • pp.63-68
    • /
    • 1996
  • In order to implement the integrated capacitive pressure sensors, which contains integrated interface circuits to detect the electrical output signal, several main factors that have a bad effect on the characteristics of sensors must be improved, such as parasitic capacitance effects, temperature/thermal drift, and the leakage current of a readout circuitry. This paper describes the novel design of the dedicated CMOS readout circuitry that is consists of two capacitance to frequency converters and 4 bit digital logic compensating circuits. Dividing the oscillation frequency of a sensing sensor by that of reference sensor, this circuit is designed to eliminate the thermal/temperature drift and the effect of the leakage currents, and to access a digital signals to obtain a high signal-to-noise(S/N)ratio. Therefore, the resolution of this circuit can be increased by increasing the number of the digital bits. Digital compensated circuits of this circuits, except for the C-F converters, are fabricated on a FPGA chip, and fundamental performance of the circuits are evaluated.

  • PDF