• 대한기계학회:학술대회논문집
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• 대한기계학회 2000년도 춘계학술대회논문집B
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• pp.721-727
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• 2000

Impedance method was carried out to design the electrode that can measure the void fraction of the bubbly flow in pool reservoir. To find out the optimum electrode shape, Styrofoam-tests were performed in a specially designed acrylic reservoir. Three kinds of electrodes were designed to compare the characteristics of water-air flow. The resistance was increased as the void fraction increased and the capacitance was decreased as the void fraction increased. The resistance is a main parameter to express the nature of the water-air flow in impedance method. Almost all the values of impedance were involved in resistance. The degree of deviation from the mean-resistance values showed reasonable results. Electrode type-I expressed excellent results among the three electrode shapes. The impedance values in void fraction 0-10% were similar to those of Maxwell's equation. But the impedance values in void fraction 10-20% were not similar to those of Maxwell' equation because of the edge effect near electrode.

• Journal of electromagnetic engineering and science
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• 제17권1호
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• pp.34-38
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• 2017

In this paper, we propose an active tunable bandpass filter (BPF) for efficient spectrum sensing in the TV White Space (TVWS) band. By designing a narrow bandwidth, it is possible to improve the sensing probability. The basic circuit configuration involves switching the PIN diode compromising capacitor bank to change the capacitance of the LC resonant circuit. To cover the whole TVWS band effectively, we add a varactor diode, and the bandwidth is set to 25-MHz. We improve the insertion loss by using the active capacitance circuit. The tunable BPF in the TVWS band with a 20-MHz interval is designed to have 11 channels with a bandwidth of 25 MHz and a low insertion loss of 1.7-2.0 dB.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 춘계종합학술대회
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• pp.288-292
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• 2002

RF 회로에 적합한 새로운 형태의 on-chip ESD protection 방법을 제시하였다. RF 회로의 특성을 이용하여 DC blocking capacitor 앞에 short-circuited stub를 달아서 ESD 소자로 활용하였다. 특히 short-circuited stub를 매칭 회로의 일부로 사용하여 stub의 길이를 줄일 수 있다. 또한 short-circuited stub의 width와 metal의 성분으로 ESD threshold voltage를 쉽게 예측 가능하다. 기존의 ESD 방지 회로와 달리 RF 회로를 위한 ESD 방지 회로에서 문제시되던 기생 capacitance 성분에 대한 문제점을 해결 할 수 있었다.

• 한국통신학회논문지
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• 제29권4A호
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• pp.466-471
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• 2004

반도체 방식의 용량형 지문인식센서의 신호처리를 위한 개선된 회로를 설계하였다. 최 상위 센서플레이트가 지문의 굴곡을 감지한 용량의 변화를 전압의 신호로 전환하기 위해서 전하분할 방식의 회로를 적용하였다. 지문센서 감도저하의 가장 큰 원인인 센서플레이트에 존재하는 기생용량을 최소화하고 융선(ridge)과 계곡(valley) 사이의 전압차를 향상시키기 위하여 기존과는 다른 아날로그버퍼회로를 설계하였다. 센서전압과 기준전압 신호를 비교하기 위해서 비교기를 설계하였다. 제안된 신호처리회로는 0.3$\mu\textrm{m}$ 표준 CMOS 공정으로 레이아웃을 실시하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 추계학술대회 논문집 학회본부 B
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• pp.603-605
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• 1998

In recent years, chip delay estimation has had an increasingly important impact on overall design technology. The analysis of the timing behavior of an ASIC should be based not only on the delay characteristics of gates and interconnect circuits but also on the interactions between them. This model plays an important role in our CAD system to analyze the ASIC timing characteristics accurately, together with two-dimensional gate delay table model, AWE algorithm and effective capacitance concept. In this paper, we present an efficient algorithm which accounts for series resistance by computing a reduced-order approximation for the driving-point admittance of an RC-tree and an effective capacitance equation that captures the complete waveform response accurately.

• 반도체디스플레이기술학회지
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• 제7권1호
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• pp.53-57
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• 2008

$Pb(ZrTi)O_3$ thin films were prepared on transparent conducting oxides, through sol-gel processing. The processing variables such as spin velocity, spin time and annealing temperature were investigated using a statistical design of experiments. Dielectric properties were determined through capacitance-voltage measurements and electrical characterizations evaluated using current-voltage characteristics. The leakage currents is determined mainly by annealing. The capacitance and breakdown voltage is found to be independent of the processing variables. The sophisticatedly controlled PZT thin films have been confirmed through microscopic images.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.945-947
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• 2003

Various kinds of practical machines using single phase induction motor(SPIM) are necessary to control speed and torque. In particular, capacitor-run type SPIM has constitutional characteristics, the motor torque is changed by auxiliary capacitance variation. In this study, we manifest equivalent model having more simplicity, and study the relation between torque and capacitance value of SPIM. And analyze Magnetic vibration for FEM(Finite Element Method) simulation. Also, We design the experimental controller which is able to speed control accurately by phase angle control of AC input voltage. Through the simulation and experimental results, we confirmed validity of this study.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.320-323
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• 2000

In the resent years, the Thin Film Transistor Liquid Crystal Display(TFT-LCD) have trend toward larger panel sizes and higher spatial and/or gray-scale resolution. In this trend, Because of its low field effect mobility, a-Si TFT is change to poly-Si TFT. In this paper, both effective-medium model of poly-Si TFTs and empirical capacitance model are applied to Pixel Design Array Simulation Tool (PDAST) and the pixel characteristics of TFT-LCD array were simulated, which were compared with the results calculated by Aim-Spice.

• Journal of Power Electronics
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• 제19권1호
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• pp.1-10
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• 2019

Current imbalance is the main factor affecting the lifespan of light-emitting diode (LED) lighting systems and is generally solved by active or passive approaches. Given many new lighting applications, independent control is particularly important in achieving different levels of luminance. Existing passive and active approaches have their own limitations in current sharing and independent control, which bring new challenges to the design of LED drivers. In this work, a multichannel resonant converter based on switched-capacitor control (SCC) is proposed for solving this challenge. In the resonant network of the upper and lower half-bridges, SCC is used instead of fixed capacitance. Then, the individual current of the LED array is obtained through regulation of the effective capacitance of the SCC under a fixed switching frequency. In this manner, the complexity of the control unit of the circuit and the precision of the multichannel outputs are further improved. Finally, the superior performance of the proposed LED driver is verified by simulations and a 4-channel experimental prototype with a rated output power of 20 W.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권2호
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• pp.186-192
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• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.