• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.270-277
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• 2012

This paper presents a new DAC design strategy to achieve a wideband dynamic linearity by increasing the bandwidth of the output impedance. In order to reduce the dominant parasitic capacitance of the conventional matrix structure, all the cells associated with a unit current source and its control are stacked in a single column very closely (stacked unit cell structure). To further reduce the parasitic capacitance, the size of the unit current source is considerably reduced at the sacrifice of matching yield. The degraded matching of the current sources is compensated for by a self-calibration. A prototype 6-bit 3.3-GS/s current-steering full binary DAC was fabricated in a 1P9M 90 nm CMOS process. The DAC shows an SFDR of 36.4 dB at 3.3 GS/s Nyquist input signal. The active area of the DAC occupies only $0.0546mm^2$ (0.21 mm ${\times}$ 0.26 mm).

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.304-307
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• 2004

As optical fiber communication grows, the fiber alignment become the focus of industrial attention. This greatly influence the overall production rates for the opto-electric products. We proposed multi-axis nano positioning stage for optical fiber alignment. This device has 3 DOF translation and sub nanometer resolution. This nano stage consist of 3 PZT-driven flexure stages which are stacked parallel. The displacement of it is measured with capacitance gauge and is controlled by computer-embedded main controller. The design process of flexure stage using FEM is proposed and the performance evaluation of this system is verified with experiments.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.99-102
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• 2005

In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard $0.25\;{\mu}m$ CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The $g_m$ value of MOSFET is calculated by using new drain current model.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.330-334
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• 1999

This paper presents a new transient voltage blocking device (TBD) for commucation facilities with low power and high frequency bandwidth. Conventional protection devices have some problems such as low frequency bandwidth, low energy capacity and high remnant voltage. In order to improve these limitations, the new TBD, which consists of a gas tube, avalanche diodes and junction type field effect transistors (JFETs), was designed and fabricated JFETs were used as an active non-linear element and a high speed switching diode with low capacitance limits high current. Therefore the avalanche diodes with low energy capacity are protected from the high current, and the TBD has a very small input capacitance. From the performance test using surge generator, which can produce 1.2/50${\mu}\textrm{s}$ 4.2 k$V_{max}$, 8/20${\mu}\textrm{s}$ 2.1 kA$\sub$max/, it is confirmed that the proposed TBD has an excellent protection performance in tight clamping voltage and limiting current characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.680-683
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• 2001

The output characteristics of step-down piezoelectric transformer is changed by a structure of layers. In this paper, we simulated output characteristics of multi-layer piezoelectric transformers with variation of output layers. Also, fabricated piezoelectric transformers were compared with simulated data. From simulated piezoelectric transformers, the output voltage decreased with increasing number of layers. From these results, piezoelectric transformers were made and the output electrical power of the transformers was measured at resonance frequency and at other frequency. The electrical power of transformers was measured on each transformer's resonance mode. However, measured value of 12-layed transformer's output power was smaller than that of 6-layered transformer's one. It is supposed that internal capacitance and reactance of the piezoelectric transformer's were effected in this result. Therefore we need to connect other road resistance and capacitance in output circuit, in order to increase electrical power of transformers.

• Journal of Information Display
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• v.1 no.1
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• pp.29-31
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• 2000

A 21.6" a-Si:H TFT array for direct conversion X-ray detector with 2480 by 3072 pixels is successfully developed. To obtain X-ray image of satisfactory quality, a novel structure with a storage electrode on BCB is proposed. The structure reduces the parasitic capacitance of data line, which is one of the main sources of signal noise. Also, the structure shows greater resistance to failure than that of the conventional design.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.181-184
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• 2001

A coplanar waveguide(CPW) on a dielectric substrate consists of a center strip conductor with semi-infinite ground planes on either side. This type of waveguide offers several advantages over microstrip line. It facilitates easy shunt as well as series mounting of active and passive devices. It eliminates the need for wraparound and via holes, and it has a low radiation loss. These, as well as several other advantages, make CPW ideally suited for microwave integrated circuit applications. However, very little information is available in the literature on models for CPW discontinuities. This lack of sufficient discontinuity models for CPW has limited the application of CPW in microwave circuit design. We presented for the characteristics of coplanar waveguide open end capacitance and series gap capacitance. Measurements by utilizing the resonance method were made and the experimental data confirmed the validity of theories. The relationships between the CPW capacitances and the physical dimensions were studied.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1466-1468
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• 1996

The standards of the capacitance arc measured and analyzed by the dry nitrogen or mica film as a dielectric. In this paper, respectively the standard capacitors of 10 pF and 100 pF for the establishment of the dielectric loss tangent are made by $Al_{2}O_{3}$ crystal disc with the low dielectric loss tangent, and then measured the dielectric loss tangent with precision. To regard for the existence of capacitances just in the dielectric, 3-terminal configuration electrode is used. With using the 2D electric field simulator, precise design values are derived in addition to stray capacitance. As stated above method, respectively the standards of the capacitances with 10 pF and 100 pF arc made with the low dielectric loss tangent less than $10^{-4}$.

• Transactions of the Korean Society of Mechanical Engineers
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• v.19 no.7
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• pp.1563-1572
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• 1995

The on-line cure monitoring during the cure process of fiber reinforced resin matrix composite material is important for the better quality and productivity. Among several cure monitoring methods, the dielectrometry that uses electrodes as its sensor is known to be the most promising method. In this study, the sensitivity of the dielectric sensor for the on-line cure monitoring was analyzed by finite element method and compared to the experimental results. Using the analytical results, the equation for the capacitance of the sensor was derived. Also, the optimal sensor design method was suggested after analyzing several different sensor shapes.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2004.10a
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• pp.213-218
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• 2004

As optical fiber communication grows, the fiber alignment become the focus of industrial attention. This greatly influence the overall production rates for the opto-electric products. We proposed multi-axis nano positioning stage for optical fiber alignment. This device has 3 DOF translation and sub nanometer resolution. This nano stage consist of 3 PZT-driven flexure stages which are stacked parallel. The displacement of it is measured with capacitance gauge and is controlled by computer-embedded main controller. The design process of flexure stage using FEM is proposed and the performance evaluation of this system is verified with experiments.