• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.4
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• pp.464-471
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• 2012

Self-excited induction generators (SEIG) are gaining importance as compared to conventional generators due to their capability toconvert wind energy into electrical energy for a wide range of variation in operating speed. The performance of such a generator depends upon the load, rotor speed and excitation capacitance. Therefore, depending upon the operating conditions, the output voltage and frequency of this machine goes on changing and this imposes a restriction on its usage. In order to maintain constant voltage and frequency, it need controllers, which make the circuit complicated and also increases the overall cost of power generation. This paper presents a simple controller to regulate the output voltage and frequency of SEIG for variation in its operating conditions due to any change in load, rotor speed and excitation capacitance (R, N, C) and their combination. The controller presented is simple in design, user friendly and is also less expensive, as the elements used in the controller are only resistors, inductors and capacitors. A block of SEIG for steady state operation is also modeled and presented in this paper. SEIG, Controller and other components are modeled and simulated using Matlab/Simulink.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.7
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• pp.748-756
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• 2007

In SIR filter, fringing capacitances and discontinuities yield a distorted frequency response from those expected by design formulas, especially in higher frequencies. In this paper, a procedure is presented in order to compensate for fringing capacitances and step impedance discontinuities by EM simulation for a 5th order SIR filter. This method propose the procedure of tuning the coupling and the length of individual resonator by EM simulation. For the filter composed by the tuned resonators, no further tuning is required. The procedure is experimentally justified by comparing the measured data of the fabricated filter with the simulation results.

• 한국정보통신설비학회:학술대회논문집
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• 2003.08a
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• pp.286-288
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• 2003

In this paper, in order to obtain a large differential phase shift with a little change in applied voltage, a ferroelectric reflective load circuit has been designed on top of barium strontium titanate $(Ba,Sr)TiO_3$ [BST] thin film. The design of the ferroelectric reflection-type phase shifter is based on a reflection theory of terminating circuit, which has a reflection-type analogue phase shifter with two ports terminated in symmetric phase-controllable reflective networks. To achieve large amounts of phase shift in low bias-voltage range, the effects of change of capacitance and transmission line connected with two coupled ports of a 3-dB $90^{\circ}$ branch-line hybrid coupler have been investigated. A large phase shift with a small capacitance change in the parallel terminating circuit has been demonstrated in the paper.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.4
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• pp.178-184
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• 2005

In this paper, using diplexer structure and varactor diode controlled by reverse bias voltage for diplexer switch gives possibilities to improve isolation and current characteristics. 1 have newly designed switch with high isolation by application varactor diode corresponding to capacitor of diplexer. The low-pass filter for proposed tunable diplexer passes the microwave signal in the bandwidth for wireless cellular network systems and high-pass filter passes it in the bandwidth for wireless personal communication services (PCS) network systems. As the capacitance of the low-pass filter increases, the cut-off frequency can be moved to low frequency, so that the switch is on state in cellular bandwidth and off state in the PCS bandwidth, in contrast to, as the capacitance for attenuation characteristic of high-pass filter increases, it can be moved to high frequency, so that the switch is off state and on state in the cellular bandwidth. it is possible to improve isolation and current consumption characteristics by application diplexer design methods and varactor diode. 1 expect that the tunable diplexer circuit and design methods should be able to find applications on MMIC and low temperature copired ceramic (LTCC).

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.4
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• pp.38-48
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• 1992

OEIC(Optoelectronic Integrated Circuit)'s can be integrated horizontally or vertically. Horizontal integration approach is, however, more immune to parasitic and more universally applicable. In this paper, a structural modeling, fabrication and characterization of PIN photodiodes which can be used in the horizontal integration are performed. For device modeling, we build a transmission line model from 2-D device simulation, from which lumped model parameters are extracted. The speed limits of the PIN photodiodes can also be calculated under various structural conditions from the model. Thus optimum design of horizontally integrated PIN photodiodes for high speed operation are possible. Such InGaAs/InP PIN photodiodes for long-wavelength communications are fabricated using pit etch, epi growth, planarization, diffusion and metallization processes. Planarization process using both RIE and wet etching and diffusion process using evaporated Zn$_{3}P_{2}$ film are developed. Characterization of the fabricated devices is performed through C-V and I-V measurements. At a reserve bias of 10V, the dark current is less than 5nA and capacitance is about 0.4pF. The calculated bandwidth using the measured series resistance and capacitance is about 4.23GHz.

• Journal of Power Electronics
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• v.13 no.4
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• pp.558-568
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• 2013

In this paper, a new decoupling technique for a flyback inverter using an active power decoupling circuit with auxiliary winding and a novel switching pattern is proposed. The conventional passive power decoupling method is applied to control Maximum Power Point Tracking (MPPT) efficiently by attenuating double frequency power pulsation on the photovoltaic (PV) side. In this case, decoupling capacitor for a flyback inverter is essentially required large electrolytic capacitor of milli-farads. However using the electrolytic capacitor have problems of bulky size and short life-span. Because this electrolytic capacitor is strongly concerned with the life-span of an AC module system, an active power decoupling circuit to minimize input capacitance is needed. In the proposed topology, auxiliary winding defined as a Ripple port will partially cover difference between a PV power and an AC Power. Since input capacitor and auxiliary capacitor is reduced by Ripple port, it can be replaced by a film capacitor. To perform the operation of charging/discharging decoupling capacitor $C_x$, a novel switching sequence is also proposed. The proposed topology is verified by design analysis, simulation and experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.443-450
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• 2014

This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.437-438
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• 2007

In this paper a embedded decoupling capacitor design with gap structure will be discussed. A novel structure is modeling and analization by High Frequency Structure Simulator (HFSS). Proposed capacitor have $2m{\times}2m$ in rectangular shape. The film thickness of copper/dielectric film/substrate is respectively 35um/20um/35um. A dielectric layer of BaTiO3/epoxy has the relative permittivity of 25. Compare of the planar decoupling capacitor, capacitance densities of this structure in the range of $55{\mu}F$/mm2 have been obtained with 50um gap while capacitance densities of planar structure $55{\mu}F$/mm2 in the same size. The frequency dependent behavior of capacitors is numerically extracted over a wide frequency bandwidth 500MHz-7GHz. The decoupling capacitor can work at high frequency band increasing the gap size.

• Journal of Sensor Science and Technology
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• v.19 no.6
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• pp.497-503
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• 2010

This paper reports a chemomechanical explosive sensor based on a thin polymer membrane. The sensor consists of thin parylene membrane and electrodes. Parylene membrane is functionalized with 4-mercaptophenol which interacts strongly with nitrotoluene based explosives. The membrane deflection caused by molecular interaction between the surface and explosives is monitored by capacitance between the membrane and the substrate. To measure the capacitance, electrodes are formed on the membrane and the substrate. While the previous cantilever system requires a bulky optical measuring system, this purely electric monitoring method offers a compact and effective system. Thus, this explosive sensor can be readily miniaturized and used in the field. The developed sensor can reliably detect dinitrotoluene and its limit of detection is evaluated as approximately 110 ppb.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.21 no.4
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• pp.107-113
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• 2022

At present, it is possible to manufacture electrodes down to several micrometers (~ ㎛) using inkjet printing technology owing to the development of precision ejection heads. Inkjet printing technology is also used in the manufacturing of bio-sensors, electronic sensors, and flexible displays. To reduce the difference between the electrode design/simulation performance and actual printing pattern performance, it is necessary to analyze and optimize the processable area of the ink material, which is a fluid. In this study, process optimization was conducted to manufacture an IDE pattern and fabricate an impedance sensor. A total of 25 IDE patterns were produced, with five for each lamination process. Electrode line width and height changes were measured by stacking the designed IDE pattern with a nanoparticle-based conductive ink multilayer. Furthermore, the optimal process area for securing a performance close to the design result was analyzed through impedance and capacitance. It was observed that the increase in the height of stack layer 4 was the lowest at 4.106%, and the increase in capacitance was measured to be the highest at 44.08%. The proposed stacking process pattern, which is optimized in terms of uniformity, reproducibility, and performance, can be efficiently applied to bio-applications such as biomaterial sensing with an impedance sensor.