• Proceedings of the KSME Conference
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• 2000.04b
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• pp.721-727
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• 2000

Impedance method was carried out to design the electrode that can measure the void fraction of the bubbly flow in pool reservoir. To find out the optimum electrode shape, Styrofoam-tests were performed in a specially designed acrylic reservoir. Three kinds of electrodes were designed to compare the characteristics of water-air flow. The resistance was increased as the void fraction increased and the capacitance was decreased as the void fraction increased. The resistance is a main parameter to express the nature of the water-air flow in impedance method. Almost all the values of impedance were involved in resistance. The degree of deviation from the mean-resistance values showed reasonable results. Electrode type-I expressed excellent results among the three electrode shapes. The impedance values in void fraction 0-10% were similar to those of Maxwell's equation. But the impedance values in void fraction 10-20% were not similar to those of Maxwell' equation because of the edge effect near electrode.

• Journal of electromagnetic engineering and science
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• v.17 no.1
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• pp.34-38
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• 2017

In this paper, we propose an active tunable bandpass filter (BPF) for efficient spectrum sensing in the TV White Space (TVWS) band. By designing a narrow bandwidth, it is possible to improve the sensing probability. The basic circuit configuration involves switching the PIN diode compromising capacitor bank to change the capacitance of the LC resonant circuit. To cover the whole TVWS band effectively, we add a varactor diode, and the bandwidth is set to 25-MHz. We improve the insertion loss by using the active capacitance circuit. The tunable BPF in the TVWS band with a 20-MHz interval is designed to have 11 channels with a bandwidth of 25 MHz and a low insertion loss of 1.7-2.0 dB.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.288-292
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• 2002

We propose the new type of on-chip ESD protection method for RF applications. By using the properties of RF circuits, we can use the short-circuited stub as ESD protection device in front of the DC blocking capacitor Specially, we can use short-circuited stub as the portion of the matching circuit so to reduce the and various parameters of the transmission line. This new type ESD protection method is very different from the conventional ESD protection method. With the new type ESD protection method, we remove the parasitic capacitance of ESD protection device which degrade the performance of core circuit.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.466-471
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• 2004

This paper proposes an advanced circuit for fingerprint sensor signal processing. We increased the voltage between ridge and valley by modifying the parasitic capacitance eliminating circuit of sensor plate. The analog comparator was designed for comparing the sensor signal voltage with the reference signal voltage. 1-Pixel Fingerprint sensor circuit was designed and simulated, and the layout was performed.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.603-605
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• 1998

In recent years, chip delay estimation has had an increasingly important impact on overall design technology. The analysis of the timing behavior of an ASIC should be based not only on the delay characteristics of gates and interconnect circuits but also on the interactions between them. This model plays an important role in our CAD system to analyze the ASIC timing characteristics accurately, together with two-dimensional gate delay table model, AWE algorithm and effective capacitance concept. In this paper, we present an efficient algorithm which accounts for series resistance by computing a reduced-order approximation for the driving-point admittance of an RC-tree and an effective capacitance equation that captures the complete waveform response accurately.

• Journal of the Semiconductor & Display Technology
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• v.7 no.1
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• pp.53-57
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• 2008

$Pb(ZrTi)O_3$ thin films were prepared on transparent conducting oxides, through sol-gel processing. The processing variables such as spin velocity, spin time and annealing temperature were investigated using a statistical design of experiments. Dielectric properties were determined through capacitance-voltage measurements and electrical characterizations evaluated using current-voltage characteristics. The leakage currents is determined mainly by annealing. The capacitance and breakdown voltage is found to be independent of the processing variables. The sophisticatedly controlled PZT thin films have been confirmed through microscopic images.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.945-947
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• 2003

Various kinds of practical machines using single phase induction motor(SPIM) are necessary to control speed and torque. In particular, capacitor-run type SPIM has constitutional characteristics, the motor torque is changed by auxiliary capacitance variation. In this study, we manifest equivalent model having more simplicity, and study the relation between torque and capacitance value of SPIM. And analyze Magnetic vibration for FEM(Finite Element Method) simulation. Also, We design the experimental controller which is able to speed control accurately by phase angle control of AC input voltage. Through the simulation and experimental results, we confirmed validity of this study.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.320-323
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• 2000

In the resent years, the Thin Film Transistor Liquid Crystal Display(TFT-LCD) have trend toward larger panel sizes and higher spatial and/or gray-scale resolution. In this trend, Because of its low field effect mobility, a-Si TFT is change to poly-Si TFT. In this paper, both effective-medium model of poly-Si TFTs and empirical capacitance model are applied to Pixel Design Array Simulation Tool (PDAST) and the pixel characteristics of TFT-LCD array were simulated, which were compared with the results calculated by Aim-Spice.

• Journal of Power Electronics
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• v.19 no.1
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• pp.1-10
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• 2019

Current imbalance is the main factor affecting the lifespan of light-emitting diode (LED) lighting systems and is generally solved by active or passive approaches. Given many new lighting applications, independent control is particularly important in achieving different levels of luminance. Existing passive and active approaches have their own limitations in current sharing and independent control, which bring new challenges to the design of LED drivers. In this work, a multichannel resonant converter based on switched-capacitor control (SCC) is proposed for solving this challenge. In the resonant network of the upper and lower half-bridges, SCC is used instead of fixed capacitance. Then, the individual current of the LED array is obtained through regulation of the effective capacitance of the SCC under a fixed switching frequency. In this manner, the complexity of the control unit of the circuit and the precision of the multichannel outputs are further improved. Finally, the superior performance of the proposed LED driver is verified by simulations and a 4-channel experimental prototype with a rated output power of 20 W.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.186-192
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• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.