• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2009년도 춘계학술대회 논문집
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• pp.479-480
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• 2009

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2008년도 춘계학술대회 논문집
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• pp.671-672
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• 2008

• 대한전자공학회논문지SD
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• 제43권10호
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• pp.10-21
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• 2006

850nm oxide VCSEL의 저전류 동작 가능성을 확인하기 위하여 off 전류와 on 전류를 최대한 낮춘 상태에서 VCSEL의 특성을 살펴보았다. Oxide VCSEL의 모델링을 위해 비율 방정식을 이용하여 대신호 등가회로를 만들었고, 실험 결과와 시뮬레이션 결과의 비교를 통해 각각의 계수와 특성변수를 추출하였다. 동특성에 큰 영향을 주는 커패시턴스 성분은 C-V 미터로 측정, 분석하였다. 완성된 대신호 등가회로 모델을 이용하여 커패시턴스 성분, 그리고 on 전류와 off 전류가 turn-on 특성과 turn-off 특성, eye-diagram에 미치는 영향을 분석하였다. 그 결과 지금까지는 무시해왔던 요소인 depletion 커패시턴스가 turn-on 특성에 큰 영향을 미치고, eye-diagram에도 큰 영향을 준다는 사실을 확인하였다. 그러므로 VCSEL의 고속 동작과 저전류 동작을 동시에 구현하기 위해서는 depletion 커패시턴스를 감소시키는 공정이 필요하다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.768-770
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• 2003

In AC PDP, since charges generated by gas discharge are accumulated on the dielectric. The dielectric is a major factor to determine cell capacitance and its memory effect is a play an important role in PDP driving. In this experiment, we have investigated the electro-optical characteristics with dielectric thickness and we have analyzed wall charge and wall voltage by Q-V energy diagram. The dielectric thickness was varied from 20 um to 50 um. As results, according to the dielectric thickness increase,cell capacitance and power consumption is reduced.

• Journal of Power Electronics
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• 제7권1호
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• pp.38-43
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• 2007

An External Electrode Fluorescent Lamp (EEFL) has longer lifespan, higher power efficiency and higher luminance than a Cold Cathode Fluorescent Lamp (CCFL). Moreover, it is easy to drive them in parallel. Therefore, the EEFL is expected to quickly replace the CCFL in LCD backlight systems. However, the EEFL has more complex characteristics than the CCFL with a resistive component, because it has both a resistive component by plasma and a capacitive component by external electrode. In this paper, values of resistance and capacitance are measured at several power levels and at several operating frequencies. They are expressed by a numeral formula based on a linear approximation that represents the equivalent resistance and capacitance as a function of power. Then we made block diagram of the equivalent circuit model using numerical expressions. Simulation waveforms and experimental results are presented to verify the feasibility of the equivalent model.

• Journal of Advanced Marine Engineering and Technology
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• 제35권7호
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• pp.966-973
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• 2011

Power distribution onboard vessel is typically configured as ungrounded system due to the ability to continuously supply electric power even when an earth fault occurs. The impedance connections between 3 phase power lines and hull cause the line-to-hull voltages to become unstable and increased in case the impedances are unbalanced, bringing the situation susceptible to electric shock and deterioration of insulation material. Also the line-to-hull voltage can reach to a certain maximum value in the steady state depending on the distributed capacitances and grounding resistances between lines and hull. This study suggests how to find and calculate the maximum line-to-hull voltage in view of magnitude and phase angle based on the vector diagram.

• 대한전기학회논문지:시스템및제어부문D
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• 제49권6호
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• pp.316-321
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• 2000

In this paper, we proposed MBDD(Modified Binary Decision Diagram) as a multi-level logic synthesis method and a vertex of MBDD to NMOS transistors matching. A vertex in MBDD is matched to a set of NMOS transistors. MBDD structure can be achieved through transformation steps from BDD structure. MBDD can represent the same function with less vertices less number of NMOS transistors, consequently capacitance of the circuit can be reduced. Thus the power dissipation can be reduced. We applied MBDD to a full odder and a 4-2compressor. Comparing the 4-2compressor block with other synthesis logic, 31.2% reduction and 19.9% reduction was achieved in numbers of transistors and power dissipation respectively. In this simulation we used 0.8 ${\mu}{\textrm}{m}$ fabrication parameters.

• 한국표면공학회지
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• 제56권4호
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• pp.227-232
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• 2023

In this study, complex admittance as a function of temperature and frequency was measured to analyze the important relaxation properties of lead scandium niobate, which is physically important, although it is not an environmentally friendly electrical and electronic material, including lead. Lead scandium niobate was synthesized by heat treating the solid oxide, and the conductance, susceptance and capacitance were measured as a function of temperature and frequency from the temperature dependence of the RLC circuit. The relaxation characteristics of lead scandium niobate were found to be affected by contributions such as grain size, grain boundary characteristics, space charge, and dipole arrangement. As the temperature rises, the maximum admittance and susceptance increase in one direction, but the resonance frequency decreases below the transition temperature but increases after the phase transition.

• 한국진공학회지
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• 제15권6호
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• pp.587-593
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• 2006

외부전극 형광램프를 광원으로 하는 백라이트의 저항$(R_L)$과 전기용량(C), 그리고 인버터의 트랜스포머 인덕턴스(L)로 구성된 회로를 분석하였다. 램프의 저항과 전기용량은 램프에 흐르는 전류와 전압의 위상차 및 Q-V 그래프에서 결정된다. 32인치용 EEFL 램프 하나의 저항 값은 $66\;k\Omega$이고 전기용량은 21.61 pF이다. 20 개의 EEFL을 병렬 연결한 백라이트의 저항은 $3.3\;k\Omega$이고 전기용량은 402.1 pF이다. 램프 및 트랜스포머 회로에서 임피던스 매칭 주파수는 2 차 코일의 인덕턴스 $L_2$와 결합계수 k로 나타내며, $\omega_M=1/\sqrt{L_2C(1-k^2)}$ 이다. 램프 시스템의 전류와 전압은 임피던스 매칭 주파수에서 최대값을 갖는다. 이러한 해석 해의 결과는 실험 결과와 잘 일치한다.

• 마이크로전자및패키징학회지
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• 제23권4호
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• pp.69-77
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• 2016

We propose nano-scale Cu direct bonding technology using ultra-high density Cu nano-pillar (CNP) with for high stacking yield exascale 2.5D/3D integration. We clarified the joining mechanism of nano-scale Cu direct bonding using CNP. Nano-scale Cu pillar easily bond with Cu electrode by re-crystallization of CNP due to the solid phase diffusion and by morphology change of CNP to minimize interfacial energy at relatively lower temperature and pressure compared to conventional micro-scale Cu direct bonding. We confirmed for the first time that 4.3 million electrodes per die are successfully connected in series with the joining yield of 100%. The joining resistance of CNP bundle with $80{\mu}m$ height is around 30 m for each pair of $10{\mu}m$ dia. electrode. Capacitance value of CNP bundle with $3{\mu}m$ length and $80{\mu}m$ height is around 0.6fF. Eye-diagram pattern shows no degradation even at 10Gbps data rate after the lamination of anisotropic conductive film.