• Journal of the Korea Society of Computer and Information
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• v.18 no.11
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• pp.1-12
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• 2013

In multi-core processors, Last Level Cache(LLC) can reduce the speed gap between the memory and the core. For this reason, LLC has big impact on the performance of processors. LLC is composed of shared cache and private cache. In computer architecture community, most researchers have mainly focused on the management techniques for shared cache, while management techniques for private cache have not been widely researched. In conventional private LLC, memory is statically assigned to each core, resulting in serious performance degradation when the workloads are not fairly distributed. To overcome this problem, this paper proposes the replacement policy for managing private cache of LLC efficiently. As proposed core-aware cache replacement policy can reconfigure LLC dynamically, hit rate of LLC is increases drastically. Moreover, proposed policy uses 2-bit saturating counters to improve the performance. According to our simulation results, the proposed method can improve hit rates by 9.23% and reduce the access time by 12.85% compared to the conventional method.

• Proceedings of the Korea Contents Association Conference
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• 2003.11a
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• pp.234-244
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• 2003

In distributed file-systems, cooperative caching algorithm which owns the data cached at each node jointly is used to reduce an expense of disk access. Cooperative caching algorithm is the method that increases a cache hit-ratio and decrease a disk access as it holds the cache information of distributed systems in common and makes cache larger virtually. Recently, several cooperative caching algorithms decrease the message costs by using approximate information of the cache and increase the cache hit-ratio by using local and global cache fields dynamically. And they have an advantage that increases the whole field hit-ratio by sending a replaced block to the idel node on cache replacement in order to maintain the replaced block in the cache field. However the wrong approximate information deteriorates the performance, the concistency maintenance goes to great expense to exchange messeges and the cost that manages Age-information of each node to choose the idle node increases. In this thesis, we propose a cooperative cache algorithm that maintains correct cache information, minimizes the maintance cost for consistency and the management cost for cache Age-information. Also, we show the superiority of our algorithm through the performance evaluation.

• The Journal of the Korea Contents Association
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• v.5 no.6
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• pp.49-56
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• 2005

To reduce server bottlenecks in client-server computing, each client may have its own cache for later reuse. The pessimistic approach for cache management protocol leads to unnecessary waits, because, it can not be commit a transaction until the transaction obtains all requested locks. In addition, optimistic approach tends to make needless aborts. This paper suggests an efficient optimistic protocol that overcomes such shortcomings. In this paper, we present a simulation-based analysis on the performance of our scheme with other well-known protocols. The analysis was executed under the Zipf workload which represents the popularity distribution on the Web. The simulation experiments show that our scheme performs as well as or better than other schemes with low overhead.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.5
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• pp.393-400
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• 2005

XML makes it possible to query the information created and managed different applications, which is impossible if expressed in other structure or language. In using shipbuilding information management system, there is inefficiency in storing and querying such a large XML document in XDBox. XML proxy cache system is suggested to improve that. In this paper, we suggests XML proxy cache system with thought of update locality found in using shipbuilding information management system.

• The Journal of the Korea Contents Association
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• v.14 no.11
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• pp.28-38
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• 2014

In this paper, we propose the distributed cache management scheme to efficiently access small files in Hadoop Distributed File Systems(HDFS). The proposed scheme can reduce the number of metadata managed by a name node since many small files are merged and stored in a chunk. It is also possible to reduce the file access costs, by keeping the information of requested files using the client cache and data node caches. The client cache keeps small files that a user requests and metadata. Each data node cache keeps the small files that are frequently requested by users. It is shown through performance evaluation that the proposed scheme significantly reduces the processing time over the existing scheme.

• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.1
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• pp.9-16
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• 2020

Recently, the capacity of SSD has been increasing rapidly due to the improvement of flash memory density. To take full advantage of these SSDs, first of all, FTL's prompt adaptation is necessary. The FTL is a translation layer existing in SSDs to overcome the drawback of the SSD that cannot be modified in place, and has garbage collection and caching functions in addition to the map table management function. In this study, we focus on caching function, compare and analyze the cache implementation methodologies, and propose improved methods. Typical cache implementations divide the cache into groups, manage and retrieve the caches in the group as a linked list. Thus, searches are made in the order of the linked list. In contrast, we propose a method of sequential searching using the search area group of a cache registered in the map table regardless of the linked list and cache group. Experimental results show that the proposed method has a 2.5 times improvement over the conventional method.

• Journal of the Korea Computer Industry Society
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• v.5 no.1
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• pp.57-64
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• 2004

The speed gap between processors and disks is a serious problem. So, I/O sub-system limits the performance of computer system. To overcome the speed gap, caches have been used in computer system. By using cache, the access times to disk blocks can be reduced and the performance of computer system can be improved. In this paper, we proposed an efficient cache management algorithm for computer system which have buffer cache and disk cache. The proposed algorithm can minimize the duplicated blocks between buffet cache and disk cache. We evaluate the proposed algorithm by trace-driven simulation. The simulation results show that the proposed algorithm can reduce the mean access time to disk blocks.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.12
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• pp.704-715
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• 2004

Recently, a single or multi processor system uses the hierarchical memory structure to reduce the time gap between processor clock rate and memory access time. A cache memory system includes especially two or three levels of caches to reduce this time gap. Moreover, one of the most important things In the hierarchical memory system is the hit rate in level 1 cache, because level 1 cache interfaces directly with the processor. Therefore, the high hit rate in level 1 cache is critical for system performance. A victim cache, another high level cache, is also important to assist level 1 cache by reducing the conflict miss in high level cache. In this paper, we propose the advanced high level cache management scheme based on the processor reuse information. This technique is a kind of cache replacement policy which uses the frequency of processor's memory accesses and makes the higher frequency address of the cache location reside longer in cache than the lower one. With this scheme, we simulate our policy using Augmint, the event-driven simulator, and analyze the simulation results. The simulation results show that the modified processor reuse information scheme(LIVMR) outperforms the level 1 with the simple victim cache(LIV), 6.7% in maximum and 0.5% in average, and performance benefits become larger as the number of processors increases.

• Journal of Industrial Convergence
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• v.17 no.4
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• pp.131-137
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• 2019

In infrastructure wireless mesh networks (WMNs), in order to improve mobile users' satisfaction for the given cache hit ratio, we investigate an User centric Cache Allocation (UCA) scheme while reducing cache cost in a mesh router (MR) and expected transmission time (ETT) for content search in cache. To minimize ETT values of mobile users, a genetic algorithm based UCA (GA-UCA) scheme is provided. The goal is to maximize mobile users' satisfaction via our well defined utility, which considers content popularity and the number of mobile users. Finally, through solving optimization problem we show the optimal cache can be allocated for UCA and GA-UCA. Besides, a WMN provider can find the optimal number of mobile users for user centric cache allocation in infrastructure WMNs.

• Journal of Industrial Convergence
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• v.18 no.2
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• pp.69-75
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• 2020

Industrial IoT has much interested in wireless mesh networks (WMNs) due to cost effectiveness and coverage. According to the advance in caching technology, WMNs have been researched to overcome the throughput degradation of multihop environment. However, there is few researches of cache power consumption models for WMNs. In particular, a wired line based cache power consumption model in content-centric networks is not still proper to WMNs. In this paper, we split the amount of cache power from the idle power consumption of CPU, and then the cache hit ratio proportional power consumption model (CHR-model) is proposed. The proposed CHR-model provides more accurate power consumption in WMNs, compared with the conventional cache power efficiency based consumption model (CPE-model). The proposed CHR-model can provide a reference model to improve energy-efficient cache operation for Industrial IoT.