• 대한전기학회논문지:시스템및제어부문D
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• 제53권2호
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• pp.86-93
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• 2004

The DCT algorithm needs an efficient hardware architecture to compute inner product. The conventional design method, like ROM-based DA(Distributed Arithmetic), has large hardware complexity. Because of this reason, a CSHM(Computation Sharing Multiplication) was proposed for implementing inner product by Park. However, the Park's CSHM has inefficient hardware architecture in the precomputer and select units. Therefore it degrades the performance of the multiplier. In this paper, we presents the optimization design method for inner product using CSHM algorithm and applied it to implementation of 1-D DCT processor. The experimental results show that the proposed multiplier is more efficient than Park's when hardware architectures and logic synthesis results were compared. The designed 1-D DCT processor by using proposed design method is more high performance than typical methods.

• 한국통신학회논문지
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• 제31권6C호
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• pp.603-613
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• 2006

저전력 설계는 시스템의 소모전력을 줄임으로써 에너지 절약과 함께 휴대용 장치의 배터리 수명을 극대화시킴에 있어 직면한 가장 중요한 문제이다. 본 논문에서는 개량형 CSHM을 이용하여 저전력 DCT 구조를 제안하였다. 제안된 구조는 Computation Sharing Multiplication 연산 과정 중 불필요한 비트에 대한 연산을 수행하지 않는다. 실험 결과, 기존의 DCT 알고리즘과 동일한 연산 결과를 보이면서도 최대 약 9%의 소모전력이 감소하였다. 따라서 제안된 저전력 DCT 구조는 저전력 및 고성능으로 DCT 알고리즘을 처리해야하는 휴대용 멀티미디어 시스템에 적용이 가능하다.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2005년도 춘계학술발표대회
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• pp.863-866
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• 2005

Low-power design is one of the most important challenges encountered in maximizing battery life in portable devices as well as saving energy during system operation. In this paper we propose a low-power DCT (Discrete Cosine Transform) architecture using a modified Computation Sharing Multiplication (CSHM). The overall rate of power consume is reduced during DCT: the proposed architecture does not perform arithmetic operations on unnecessary bits during the Computation Sharing Multiplication calculations. Experimental results show that it is possible to reduce power dissipation up to about $7{\sim}8%$ without compromising the final DCT results. The proposed lowpower DCT architecture can be applied to consumer electronics as well as portable multimedia systems requiring high throughput and low-power.