• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.12
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• pp.2401-2409
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• 2016

Android CPU governors exploit the DVFS (Dynamic Voltage Frequency Scaling) technique. The DVFS is a power management technique where the CPU operating frequency is decreased to allow a corresponding reduction in the CPU supply voltage. The power consumed by a CPU is approximately proportional to the square of the CPU supply voltage. Therefore, lower CPU operating frequency allows the CPU supply voltage to be lowered. This helps to reduce the CPU power consumption. However, lower CPU operating frequency increases a task's execution time. Such an increase in the task's execution time makes the task's response time longer and makes the task's deadline miss occur. This finally leads to degrading the quality of service provided by the task. In this paper, we evaluated the performance of Android CPU governors in terms of the power consumption, tasks's response time and deadline miss ratio.

• Journal of Information Processing Systems
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• v.13 no.4
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• pp.941-950
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• 2017

The round robin algorithm is regarded as one of the most efficient and effective CPU scheduling techniques in computing. It centres on the processing time required for a CPU to execute available jobs. Although there are other CPU scheduling algorithms based on processing time which use different criteria, the round robin algorithm has gained much popularity due to its optimal time-shared environment. The effectiveness of this algorithm depends strongly on the choice of time quantum. This paper presents a new effective round robin CPU scheduling algorithm. The effectiveness here lies in the fact that the proposed algorithm depends on a dynamically allocated time quantum in each round. Its performance is compared with both traditional and enhanced round robin algorithms, and the findings demonstrate an improved performance in terms of average waiting time, average turnaround time and context switching.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.148-159
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• 2005

We propose a technique for finding the worst case response time (WCRT) of a DMA request that is needed in the schedulability analysis of a whole real-time system. The technique consists of three steps. In the first step, we find the worst case bus usage pattern of each CPU task. Then in the second step, we combine the worst case bus usage pattern of CPU tasks to construct the worst case bus usage pattern of the CPU. This second step considers not only the bus requests made by CPU tasks individually but also those due to preemptions among the CPU tasks. finally, in the third step, we use the worst case bus usage pattern of the CPU to derive the WCRT of DMA requests assuming the fixed-priority bus arbitration protocol. Experimental results show that overestimation of the DMA response time by the proposed technique is within $20\%$ for most DMA request sizes and that the percentage overestimation decreases as the DMA request size increases.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.4
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• pp.304-308
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• 2009

This paper presents the deadline driven CPU-Power management scheme for the Real-Time Embedded OS: named TMO-eCos. It used the scheduling scenarios generated by a task serialization technique for hard real- time TMO system. The serializer does a off-line analysis at design time with period, deadline and WCET of periodic tasks. Finally, TMO-eCos kernel controls the CPU speed to save the power consumption under the condition that periodic tasks do not violate deadlines. As a result, the system shows a reasonable amount of power saving. This paper presents all of these processes and test results.

• International Journal of Computer Science & Network Security
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• v.21 no.1
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• pp.19-26
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• 2021

CPU is considered the main and most important resource in the computer system. The CPU scheduling is defined as a procedure that determines which process will enter the CPU to be executed, and another process will be waiting for its turn to be performed. CPU management scheduling algorithms are the major service in the operating systems that fulfill the maximum utilization of the CPU. This article aims to review the studies on the CPU scheduling algorithms towards comparing which is the best algorithm. After we conducted a review of the Round Robin, Shortest Job First, First Come First Served, and Priority algorithms, we found that several researchers have suggested various ways to improve CPU optimization criteria through different algorithms to improve the waiting time, response time, and turnaround time but there is no algorithm is better in all criteria.

• KIPS Transactions on Computer and Communication Systems
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• v.7 no.9
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• pp.219-226
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• 2018

One of the systematic ways to generate the number of all cases is a combination to construct a combination tree, and its time complexity is O($2^n$). A combination tree is used for various purposes such as the graph homogeneity problem, the initial model for calculating frequent item sets, and so on. However, algorithms that must search the number of all cases of a combination are difficult to use realistically due to high time complexity. Nevertheless, as the amount of data becomes large and various studies are being carried out to utilize the data, the number of cases of searching all cases is increasing. Recently, as the GPU environment becomes popular and can be easily accessed, various attempts have been made to reduce time by parallelizing algorithms having high time complexity in a serial environment. Because the method of generating the number of all cases in combination is sequential and the size of sub-task is biased, it is not suitable for parallel implementation. The efficiency of parallel algorithms can be maximized when all threads have tasks with similar size. In this paper, we propose a method to efficiently collaborate between CPU and GPU to parallelize the problem of finding the number of all cases. In order to evaluate the performance of the proposed algorithm, we analyze the time complexity in the theoretical aspect, and compare the experimental time of the proposed algorithm with other algorithms in CPU and GPU environment. Experimental results show that the proposed CPU and GPU collaboration algorithm maintains a balance between the execution time of the CPU and GPU compared to the previous algorithms, and the execution time is improved remarkable as the number of elements increases.

• International Journal of Computer Science & Network Security
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• v.23 no.7
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• pp.165-170
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• 2023

Scheduling algorithms plays a significant role in optimizing the CPU in operating system. Each scheduling algorithms schedules the processes in the ready queue with its own algorithm design and its properties. In this paper, the performance analysis of First come First serve scheduling, Non preemptive scheduling, Preemptive scheduling, Shortest Job scheduling and Round Robin algorithm has been discussed with an example and the results has been analyzed with the performance parameters such as minimum waiting time, minimum turnaround time and Response time.

• Journal of KIISE
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• v.42 no.11
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• pp.1322-1331
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• 2015

According to the hypervisor scheduler, the vCPU (virtual CPU) operates under two states: the running state and the stop state. When the vCPU is in the stop state, incoming events are delayed until that vCPU's state changes to the running state. The latency in handling such events that are sent to the vCPU is regarded as the I/O latency. Since a SMP (symmetric multiprocessing) VM (virtual machine) incorporates multiple vCPUs, the event latency on a SMP VM can vary according to specific vCPU that receives the event. In this paper, we propose a new scheme named event routing that sends events according to the operation state of each vCPU to reduce the event latency on an SMP VM. We implemented the proposed event routing scheme in Xen ARM hypervisor and confirmed the reduction of I/O latency from measuring the network RTT (round trip time) and the TCP bandwidth under a variety of testing conditions. The network RTT decreases by up to 94% and the TCP bandwidth increases up to 35% when compare to native Xen ARM.

• Journal of Digital Convergence
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• v.12 no.3
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• pp.227-235
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• 2014

Mobile virtualization is an approach to mobile device management in which two virtual platforms are installed on a single wireless device. A smartphone, a single wireless device, might have one virtual environment for business use and one for personal use. Mobile virtualization might also allow one device to run two different operating systems, allowing the same phone to run both RTOS and Android apps. In this paper, we propose the techniques to virtualize the cores of a multicore, allowing the reassign any number of vCPUs that are exposed to a OS to any subset of the pCPUs. And then we also propose the real-time scheduling method to assigning the vCPUs to the pCPU. Suggested technology in this paper solves problem that increases time of real-time process when interrupt are handled, and is able more to fast processing than previous algorithm.

• Resources Recycling
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• v.25 no.6
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• pp.3-12
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• 2016

In this study, Au distribution in F-PGA chip and W-BGA chip were examined to recover Au effectively from CPU chips. The result showed that 80.8% and 89.8% of Au exist in terminal of F-PGA chip and bare die of W-BGA chip, respectively. Based on the fact that Au exists in specific parts of the chips, an CPU chip dismantling apparatus was developed. The experimental variables were roller rotating speed, heat temperature of IR heater and heating time. Terminals of F-PGA chips were completely recovered under the temperature of $300^{\circ}C$ and the residence time of 90 s. Bare dies of W-BGA chips were completely recovered as well under the temperature of $300^{\circ}C$, the roller rotating rate of 90 rpm and the residence time of 90 s.