• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.59-59
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• 2009

현재 CMP분야는 광역 평탄화 반도체 소자의 집적화 및 소형화가 진행됨에 따라서 CMP 공정의 중요성은 날로 성장하고 있다. 하지만 이러한 CMP공정은 불가피하게도 scratch, pit, CMP residue와 같은 defect들을 발생시키고 있으며, 점점 선폭이 작아짐에 따라, 이러한 defect들이 반도체 수율에 미치는 영향은 심각해지고 있다. Defect들 중에 특히 scratch는 반도체에 치명적인 circuit failure를 일으키게 된다. 또한 반도체 내구성과 신뢰성을 감소시키게 되고, 누전전류를 증가시키는 등 바람직하지 못한 현상들이 생기게 된다. 본 연구에서는 scratch 와 같은 deflect들을 효율적으로 검출, 분석하고, scratch를 감소시키는데 그 목적이 있다. 본 실험을 위해 8" TEOS wafer와 commercial oxide slurry 및 friction polisher (Poli-500, G&P tech., Korea)를 사용하여 CMP 공정을 진행하였으며, CMP 공정조건은 각각 80rpm/80rpm/1psi(Platen speed/Head speed/Pressure)에서 1분 동안 연마를 한 후 scratch 발생 경향을 살펴보았다. CMP 후 wafer위에 오염되어 있는 slurry residue들을 제거하기 위해 SC-1, HF 세정을 이용하여 최적화된 post-CMP 공정기술을 제안하였다. Scratch 검출 및 분석을 위해 wafer surface analyzer (Surfscan 6200, Tencor, USA)와 optical microscope (LV100D, Nicon, Japan)를 사용하였다. CMP 공정 변수들에 따른 scratch 발생정도를 비교하였으며, scratch 발생 요인들에 따른 scratch 형태 및 발생정도를 살펴보았다. 최적화된 post-CMP 세정 조건은 메가소닉과 함께 SC-1 세정을 실시하여 slurry residue들을 제거한 후, HF 세정을 실시하여 잔여 오염물들을 제거하고 검출이 용이하도록 scratch를 확장시킬 수 있도록 제안하였으며, 100%의 particle removal efficiency (PRE)를 얻을 수 있었다. 실제 CMP 공정후 post-CMP 세정 단계별 scratch 개수를 측정한 결과, SC-1 세정 후 약 220개의 scratch가 검출되었으며, 검출되지 않았던 scratch가 HF 세정 후 확장되어 드러남에 따라 약 500개의 scratch 가 검출되었다.

• Tribology and Lubricants
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• 제32권2호
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• pp.67-71
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• 2016

This study investigates the characteristics of the sapphire wafer chemical mechanical polishing (CMP) process. The material removal rate is one of the most important factors since it has a significant impact on the production efficiency of a sapphire wafer. Some of the factors affecting the material removal rate include the pressure, platen speed and slurry. Among the factors affecting the CMP process, we analyzed the trends in the material removal rate and surface roughness, which are mechanical factors corresponding to both the pressure and platen speed, were analyzed. We also analyzed the increase in the material removal rate, which is proportional to the pressure and platen speed, using the Preston equation. In the experiment, after polishing a 4-inch sapphire wafer with increasing pressure and platen speed, we confirmed the material removal rate via thickness measurements. Further, surface roughness measurements of the sapphire wafer were performed using atomic force microscopy (AFM) equipment. Using the measurement results, we analyzed the trends in the surface roughness with the increase in material removal rate. In addition, the experimental results, confirmed that the material removal rate increases in proportion to the pressure and platen speed. However, the results showed no association between the material removal rate and surface roughness. The surface roughness after the CMP process showed a largely consistent trend. This study demonstrates the possibility to improve the production efficiency of sapphire wafer while maintaining stable quality via mechanical factors associated with the CMP process.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.65-65
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• 2007

Microstructure and surface roughness of the sensing materials should be improved to use them in advanced sensor applications because the uneven surface roughness degrades the light reflection, pattern resolution, and devices performance. Chemical mechanical polishing (CMP) processing was selected for improving the surface roughness of $CeO_2$ which is one of the well known materials for the oxygen gas sensors. Surface roughness and removal rate of spin coated $CeO_2$ thin films were examined with a change of CMP process parameters such as down force and table speed. The optimized process condition, reflected by the surface roughness with the hillock-free surface as well as the excellent removal rate with the good uniformity, was obtained. The effects of the improved surface roughness on the sensing property of $CeO_2$ thin films were also confirmed. The improved sensitivity of $CeO_2$ thin films for oxygen sensors were obtained after CMP process by the improved surface characteristics. Therefore, we conclude that sensing property of $CeO_2$ thin film is strongly dependent on the surface roughness of $CeO_2$ thin films by using CMP process.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.523-524
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• 2007

This paper discusses the planarization process of thick copper film structure used for power supply device. Chemical mechanical polishing(CMP) has been used to remove a metal film and obtain a surface planarization which is essential for the semiconductor devices. For the thick metal removal, however, the long process time and other problems such as dishing, delamination and metal layer peeling are being issued, Compared to the traditional CMP process, Electro-chemical mechanical planarization(ECMP) is suggested to solve these problems. The two-step process composed of the ECMP and the conventional CMP is used for this experiment. The first step is the removal of several tens ${\mu}m$ of bulk copper on patterned wafer with ECMP process. The second step is the removal of residual copper layer aimed at a surface planarization. For more objective comparison, the traditional CMP was also performed. As an experimental result, total process time and process defects are extremely reduced by the two-step process.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2002년도 춘계 학술발표강연 및 논문개요집
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• pp.56-56
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• 2002

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1997년도 추계학술대회 논문집
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• pp.456-460
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• 1997

As device sizes are scaled to submicron dimensions, planarization technology becomes increasing1y important, both during device fabrication and during formation of multilevel interconnects and wiring. Chemical Mechanical Polishing (CMP) has emerged recently as a new processing technique for achieving a high degree of planarization for submicron VLSI applications. This paper is presented the results of CMP process window characterization studies for 0.35 micron process with 6 metal layers.

• Korea-Australia Rheology Journal
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• 제14권2호
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• pp.63-70
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• 2002

Chemical mechanical planarization (CMP) is the polishing process enabled by both chemical and mechanical actions. CMP is used in the fabrication process of the integrated circuits to achieve adequate planarity necessary for stringent photolithography depth of focus requirements. And recently copper is preferred in the metallization process because of its low resistivity. We have studied the effects of chemical reaction on the polishing rate and surface planarity in copper CMP by means of numerical simulation solving Navier-Stokes equation and copper diffusion equation. We have performed pore-scale simulation and integrated the results over all the pores underneath the wafer surface to calculate the macroscopic material removal rate. The mechanical abrasion effect was not included in our study and we concentrated our focus on the transport phenomena occurring in a single pore. We have observed the effects of several parameters such as concentration of chemical additives, relative velocity of the wafer, slurry film thickness or ash)tract ratio of the pore on the copper removal rate and the surface planarity. We observed that when the chemical reaction was rate-limiting step, the results of simulation matched well with the experimental data.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1448-1449
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• 2006

Pb(Zr,Ti)$O_3$ is one of the most attractive ferroelectric materials for realizing the FeRAM due to its higher remanant polarization and the ability to withstand higher coercive fields. Generally, the ferroelectric materials were patterned by a plasma etching process for high-density FeRAM. The applicable possibility of CMP process to pattern Pb(Zr,Ti)$O_3$ instead of plasma etching process was investigated in our previous study for improvement of an angled sidewall which prevents the densification of ferroelectric memory and is apt to receive the plasma damage. Our previous study showed that good removal rate with the excellent surface roughness compared to plasma etching process were obtained by CMP process for the patterning of Pb(Zr,Ti)$O_3$. The suitable selectivity to TEOS without any damage to the structural property of Pb(Zr,Ti)$O_3$ was also guaranteed. In this study, the removal mechanism of $Pb_{1.1}(Zr_{0.52}Ti_{0.48})O_3$ coated by sol-gel method was investigated. Surface analysis of polished specimens at the best and worst conditions was carried out by XPS.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1997년도 한국재료학회 추계학술발표회
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• pp.77-77
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• 1997

• 한국재료학회:학술대회논문집
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• 한국재료학회 2000년도 추계학술발표강연 및 논문개요집
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• pp.51-51
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• 2000