• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05d
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• pp.105-108
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• 2003

CMP(chemical mechanical polishing) process has been attracted as an essential technology of multi-level interconnection. However, the COO(cost of ownership) is very high, because of high consumable cost. Especially, among the consumables, slurry dominates more than 40 %. So, we focused how to reduce the consumption of raw slurry. In this paper, We have studied the CMP (chemical mechanical polishing) characteristics of slurry by adding of raw alumina abrasive and annealed alumina abrasive. As a experimental results, we obtained the comparable slurry characteristics compared with original silica slurry in the view point of high removal rate and low non-uniformity. Therefore, we can reduce the cost of consumables(COC) of CMP process for ULSI applications.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.3
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• pp.184-191
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• 2000

Properties of pad are investigated to find the relationship between the chemical mechanical polishing(CMP) results, such as material removal rate and within wafer non-uniformity(WIWNU), and its properties. Polishing pressure is considered as important factors to affect the results, so behavior of ordinary polymer is studied to define the polishing result affecting properties of pad. Experimental setup is devised to identify the behavior of pad and several different pads are used in chemical mechanical polishing experiments to verify the correlations between pad properties and polishing results. The results indicate that the viscoelastic properties of pad had relationships with the polishing results, and shows correlation between suggested properties of pad and polishing result.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.33-36
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• 2001

Chemical mechanical polishing(CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for deep sub-micron technology. The rise throughput and the stability in the device fabrication can be obtained by applying of CMP process to STI structure in 0.18$\mu\textrm{m}$ m semiconductor device. The reverse moat process has been added to employ in of each thin films in STI-CMP was not equal, hence the devices must to be effected, that is, the damage was occurred in the device area for the case of excessive CMP process and the nitride film was remained on the device area for the case of insufficient CMP process, and than, these defects affect the device characteristics. Also, we studied the High Selectivity Slurry(HSS) to perform global planarization without reverse moat step.

• Journal of the Korean Society for Precision Engineering
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• v.19 no.1
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• pp.196-203
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• 2002

Generally, non-uniformity and removal rate are important factors on measurements of both wafer and die scale. In this study, we verify the effects of the pressure and relative velocity on the results of the chemical mechanical polishing and the effect of pattern density on inter layer dielectric chemical mechanical polishing of patterned wafer. We suggest an appropriate modeling equation, transformed from Preston\`s equations which was used in glass polishing, and simulate the removal rate of patterned wafer in chemical mechanical polishing. Results indicate that the pressure and relative velocity are dominant factors for the chemical mechanical polishing and pattern density effects on removal rate of pattern wafers in die scale. The modeling is well agreed to middle and low density structures of the die. Actually, the die used in Fab. was designed to have an appropriate density, therefore the modeling will be suitable for estimating the results of ILD CMP.

• Tribology and Lubricants
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• v.28 no.1
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• pp.7-11
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• 2012

In this paper, the results of finite element(FE) analysis of chemical mechanical polishing(CMP) process using 2-dimensional elements were discussed. The objective of this study is to find the generation mechanism of microscratches on a wafer surface during the process. Especially, a FE model with a particle inside pad pore was considered to observe how such a contact situation could contribute to microscratch generation. The results of the finite element simulations revealed that during CMP process the pad-particle mixture could be formed and this would be a major factor leading to microscratch generation.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.5
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• pp.32-37
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• 2004

Polishing processes are widely used in the glass, optical, die and semiconductor industries. Chemical Mechanical Polishing (CMP) especially is becoming one of the most important ULSI processes for the 0.25m generation and beyond. CMP is conventionally carried out using abrasive slurry and a polishing pad. But the surface of the pad has irregular pores, so there is non-uniformity of slurry flow and of contact area between wafer and the pad, and glazing occurs on the surface of the pad. This paper introduces the basic concept and fabrication technique of the next generation CMP pad using micro-molding method to obtain uniform protrusions and pores on the pad surface.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.12
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• pp.1084-1090
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• 1998

As device sizes are scaled down to submicron dimensions, planarization technology becomes increasingly important for both device fabrication and formation of multilevel interconnects. Chemical mechanical polishing (CMP) has emerged recently as a new processing technique for achieving a high degree of planarization for submicron VLSI applications. The polishing process has many variables, and most of which are not well understood. The factors determine the planarization performance are slurry and pad type, insert material, conditioning technique, and choice of polishing tool. Circuit density, pattern size, and wiring layout also affect the performance of a CMP planarization process. This paper presents the results of studies on CMP process window characterization for 0.35 micron process with 5 metal layers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.719-722
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• 2004

In this work, we applied the chemical mechanical polishing (CMP) process to the planarization of ferroelectric film. We compared the structural characteristics of BST $(Ba_{0.6}Sr_{0.4}TiO_3)$ films before and after the CMP process. Their dependence on slurry composition was also investigated. Finally, we suggest the self-developed titania $(TiO_2)$ mixed abrasive slurry (MAS) for FRAM applications. Our experimental results on the ferroelectric film are encouraging for the next generation of FRAM applications.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.441-446
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• 2003

The chemical mechanical polishing (CMP) process is now widely employed in the ultra large scale integrated (ULSI) semiconductor fabrication. Especially, shallow trench isolation (STI) has become a key isolation scheme for sub-0.13/0.10${\mu}{\textrm}{m}$ CMOS technology. The most important issues of STI-CMP is to decrease the various defects such as nitride residue, dishing, and tom oxide. To solve these problems, in this paper, we studied the planarization characteristics using slurry additive with the high selectivity between $SiO_2$ and $Si_3$$N_4$ films for the purpose of process simplification and in-situ end point detection. As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also, we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of STI-CMP process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.567-568
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• 2006

To investigate the recycle possibility of slurry for the oxide-chemical mechanical polishing (oxide-CMP) application, three kinds of retreated methods were introduced as follows: First, the effects on the addition of silica abrasives and the diluted silica slurry (DSS) on CMP performances were investigated. Second, the characteristics of mixed abrasive slurry (MAS) using non-annealed and annealed alumina ($Al_2O_3$) powder as an abrasive added within DSS were evaluated to achieve the improvement of removal rates (RRs) and within-wafer non-uniformity (WIWNU%). Third, the oxide-CMP wastewater was examined in order to evaluate the possible ways of reusing it. And then, we have discussed the CMP characteristics of silica slurry retreated by mixing of original slurry and used slurry (MOS).