• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.256-261
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• 2011

We demonstrate 3-Gb/s wireless link using a 60-GHz receiver front-end fabricated in $0.25-{\mu}m$ SiGe:C bipolar complementary metal oxide semiconductor (BiCMOS) and a mixed-mode quadrature phase-shift keying (QPSK) demodulator fabricated in 60-nm CMOS. The 60-GHz receiver consists of a low-noise amplifier and a down-conversion mixer. It has the peak conversion gain of 16 dB at 62 GHz and the 3-dB intermediate-frequency bandwidth of 6 GHz. The demodulator using 1-bit sampling scheme can demodulate up to 4.8-Gb/s QPSK signals. We achieve successful transmission of 3-Gb/s data in 60 GHz through 2-m wireless link.

• ETRI Journal
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• v.30 no.5
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• pp.729-734
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• 2008

Wireless communication systems, such as WLAN or Bluetooth receivers, employ preamble data to estimate the channel characteristics, introducing stringent settling-time constraints. This makes the use of traditional closed-loop feedback automatic gain control (AGC) circuits impractical for these applications. In this paper, a compact feedforward AGC circuit is proposed to obtain a fast-settling response. The AGC has been implemented in a 0.35 ${\mu}m$ standard CMOS technology. Supplied at 1.8 V, it operates with a power consumption of 1.6 mW at frequencies as high as 100 MHz, while its gain ranges from 0 dB to 21 dB in 3 dB steps through a digital word. The settling time of the circuit is below 0.25 ${\mu}s$.