• Title/Summary/Keyword: CHIP

Search Result 7,308, Processing Time 0.027 seconds

Recent Development of Protein Microarray and Proteogen Platform

  • Han, Moon-Hi;Kang, In-Cheol;Lee, Yoon-Suk;Cho, Yong-Wan;Lee, Eun-Kyoung
    • 한국생물공학회:학술대회논문집
    • /
    • 2005.04a
    • /
    • pp.47-47
    • /
    • 2005
  • There are many different surface technologies currently applied for preparation of protein chips. However, it requires innovative surface chemistry for capture proteins to be immobilized on chip surface keeping their conformation and activity intact and their orientation right, while they bind tightly and densely in a given array spot. Proteogen has developed 'ProteoChip BP' coated with novel proprietary linker molecules $(ProLinker^{TM})$ for efficient and robust immobilizations of capture proteins by improving surface properties of molecular captures. It was demonstrated that $ProLinker^{TM}$ gave the best surface performance in preparation of protein microarray chip base plates among others currently available on the market. In particular, the $ProLinker^{TM}-based$ surface chemistry has demonstrated to provide excellent performance in preparation of 'Antibody Chip' for analysis of biomarkers as well as proteome expression profiles. The linker molecule has also shown to be well applicable for development of biosensors and micro-beads as well as protein microarray and nano-array. ProteoChip BP can be used either for preparation of high-density array by using a microarrayer or for preparation of 'Well-on-a-Chip' with low density array, which is better applicable for quantitative analysis of biomarkers or protein-protein interactions. The biomarker assay can be performed either by direct or sandwich methods of fluorescence immunoassay. Application of ProteoChip BP has been well demonstrated by the extensive studies of 1) tumor-marker assays, 2) new drug screening by using 'Integrin Chip' and 3) protein expression profile analysis. Some of experimental results will be presented.

  • PDF

Analysis of Chip Thickness Model in Ball-end Milling (볼엔드밀 가공의 칩두께 모델 해석)

  • Sim Ki-Joung;Mun Sang-Don
    • Transactions of the Korean Society of Machine Tool Engineers
    • /
    • v.15 no.2
    • /
    • pp.73-80
    • /
    • 2006
  • This paper describes a analysis on the chip thickness model required for cutting force simulation in ball-end milling. In milling, cutting forces are obtained by multiplying chip area to specific cutting forces in each cutting instance. Specific cutting forces are one of the important factors for cutting force predication and have unique value according to workpiece materials. Chip area in two dimensional cutting is simply calculated using depth of cut and feed, but not simply obtained in three dimensional cutting such as milling due to complex cutting mechanics. In ball-end milling, machining is almost performed in the ball part of the cutter and tool radius is varied along contact point of the cutter and workpiece. In result, the cutting speed and the effective helix angle are changed according to length from the tool tip. In this study, for chip thickness model analysis, tool and chip geometry are analyzed and then the definition of chip thickness and estimation method are described. The resulted of analysis are verified by compared with geometrical simulation and other research. The proposed chip thickness model is more precise.

A Study on Automotive LED Business Strategy Based on IP-R&D : Focused on Flip-Chip CSP (Chip-Scale Packaging) (IP-R&D를 통한 자동차분야 LED사업전략에 관한 연구 : Flip-Chip을 채용한 CSP (Chip-Scale Packaging) 기술을 중심으로)

  • Ryu, Chang Han;Choi, Yong Kyu;Suh, Min Suk
    • Journal of the Semiconductor & Display Technology
    • /
    • v.14 no.3
    • /
    • pp.13-22
    • /
    • 2015
  • LED (Light Emitting Diode) lighting is gaining more and more market penetration as one of the global warming countermeasures. LED is the next generation of fusion source composed of epi/chip/packaging of semiconductor process technology and optical/information/communication technology. LED has been applied to the existing industry areas, for example, automobiles, TVs, smartphones, laptops, refrigerators and street lamps. Therefore, LED makers have been striving to achieve the leading position in the global competition through development of core source technologies even before the promotion and adoption of LED technology as the next generation growth engine with eco-friendly characteristics. However, there has been a point of view on the cost compared to conventional lighting as a large obstacle to market penetration of LED. Therefore, companies are developing a Chip-Scale Packaging (CSP) LED technology to improve performance and reduce manufacturing costs. In this study, we perform patent analysis associated with Flip-Chip CSP LED and flow chart for promising technology forecasting. Based on our analysis, we select key patents and key patent players to derive the business strategy for the business success of Flip-Chip CSP PKG LED products.

Characteristics of Gold and Silver Bimetallic Surface Plasmon Resonance Chip in Intensity Measurement Mode and Calculation of Refractive Index using Critical Angle (반사광 측정 모드에서 금과 은의 쌍금속 표면 플라즈몬 공명 칩의 특성과 임계각을 이용한 굴절률 계산)

  • Kim, Hyungjin;Lee, Sung-Youp;Kim, Hong Tak;Yang, Ki-Won;Sohn, Young-Soo
    • Journal of Sensor Science and Technology
    • /
    • v.24 no.6
    • /
    • pp.423-428
    • /
    • 2015
  • A bimetallic chip made of gold and silver was investigated in intensity interrogation mode to confirm enhancement of the SPR sensor resolution. Both reflectance curves of the bimetallic chip and the conventional gold chip was acquired and compared. The line width of the reflectance curve of the bimetallic chip was narrower than that of the conventional Au chip, resulting in steeper tangential slope. The reflectance was monitored at the angle related to the steepest tangential slope. The change in reflectance of the bimetallic chip was larger than that of the Au chip. The critical angle was analyzed by differentiating the reflectance with respect to incident angle twice. Acquiring the critical angle regarding to the sample informs the refractive index of the sample. Using various concentration of Bovine Serum Albumin, we confirmed that refractive index was linearly related to variation of reflectance of the bimetallic chip.

Development of microarrayer for manufacturing DNA chip used in genome project (I) - A summary of research trend in-and-out of state - (유전자 검색을 위한 DNA chip 제작용 로봇 시스템의 개발(I) - 국내외 연구동향 -)

  • 이현동;김기대;임용표;김찬수
    • Proceedings of the Korean Society for Agricultural Machinery Conference
    • /
    • 2002.02a
    • /
    • pp.407-412
    • /
    • 2002
  • 세계는 지금 post-genome 시대에 접어들고 있고, 하루에도 수백개 이상 밝혀지는 새로운 유전정보들이나 모든 유전암호가 밝혀진 생물들을 기존의 방법들로 연구한다는 것은 너무나 많은 시간을 요구한다. 즉, 인간 게놈 프로젝트 뿐만 아니라, 식물 게놈 프로젝트 등 다양한 분야에서 DNA chip의 필요성이 인식되고 있다. 그러나 우리나라는 DNA chip의 생산에 있어서 chip 제작에 필수적인 DNA chip 제작용 microarrayer를 고가를 들여 수입에 의존하고 있는 실정이다. 이는 DNA chip 생산비를 높이고, 더 나아가 우리나라 생명공학분야 연구의 발전에 악영향을 미치는 결과를 초래할 수 있다. 몇몇 국내 생산 업체가 있지만, 아직 그 실요성을 입증하지 못하였고, 대부분의 chip 공급업체는 아직 수입품을 사용하고 있는 상태이다. 이에 본 연구에서는 microarrayer의 국산화를 통해 안정적 DNA chip 및 microarrayer의 공급을 위해 microarrayer의 개발에 관해 수행하는 연구이며, 앞으로의 연구방향을 다음과 같이 설정하였다. 1) 유전자 검색을 위한 DNA chip 제작용 로봇 시스템 (microarrayer)을 pin 타입으로 설정한다. 2) 정밀도 향상을 위하여 로봇 시스템의 구동은 XYZ 직교좌표형으로 설정한다. 3) 1$cm^2$당 5,000개 정도의 DNA를 붙일 수 있도록 한다.

  • PDF

A Study on the Applications of Finite Element Techniques to Chip Formation and Cutting Heat Generation Mechanism of Cutting Process (CHIP생성 및 절삭열 발생기구 해석을 위한 유한요소법 적용에 관한 연구)

  • Hwang, Joon;Namgung, Suk
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.12 no.9
    • /
    • pp.148-155
    • /
    • 1995
  • The object of this study is to achieve a gteater understanding of meterial removal process and its mechanism. In this study, some applications of finite element techniques are applied to analyze the chip formation and cutting heat generation mechanism of metal cutting. To know the effect of cutting parameters, simulations employed some independent cutting variables change, such as constitutive deformation laws of workpiece and tool material, frictional coefficients and tool-chip contact interfaces, cutting speed, tool rake angles, depth of cut and this simulations also include large elastic-plastic defor- mation, adiabetic thermal analysis. Under a usual plane strain assumption, quasi-static, thermal-mechanical coupling analysis generate detailed informations about chip formation process and cutting heat generation mechanism Some cutting parameters are affected to cutting force, plastic deformation of chip, shear plane angle, chip thickness and tool-chip contact length and reaction force on tool, cutting temperature and thermal behavior. Several aspects of the metal cutting process predicted by the finite element analysis provide information about tool shape design and optimal cutting conditions.

  • PDF

A New Smart Stacking Technology for 3D-LSIs

  • Koyanagi Mitsu
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2005.09a
    • /
    • pp.89-110
    • /
    • 2005
  • A new 3D integration technology using wafer-to-wafer and chip-to-wafer stacking method was described. It was demonstrated that 3D microprocessor, 3D shared memory, 3D image processing chip and 3D artificial retina chip fabricated using 3D integration technology were successfully operated. The possibility of applying 3D image processing chip and 3D artificial retina chip to Robot's eye was investigated. The possibility of implanting 3D artificial retina chip into human eye was investigated.

  • PDF

Pridiction of chip breakability by an orthogonal array method (직교배열법에 의한 칩절단특성 예측)

  • 이영문;양승한;권오진
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2001.04a
    • /
    • pp.1008-1011
    • /
    • 2001
  • The purpose of this paper is to evaluate the chip breakability during turning using the experimental equation, which is developed by an orthogonal array method. The chip breaking index(CB), non-dimensional parameter is used in the evaluation of chip breakability. The analysis of variance(ANOVA)-test has been used to check the significance of cutting parameters. And using the result of ANOVA-test, the experimental equation of chip breakability, which consists of significant cutting parameters, has been developed.

  • PDF

Identification of the Chip Form Using Back Propagation Algorithm (백프로파게이션 알고리즘을 이용한 칩 형태의 인식)

  • 심재형;권혁준;백인환
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 1996.11a
    • /
    • pp.206-211
    • /
    • 1996
  • A major problem in automation of turning operation is the difficulty in obtaining a sufficient and reliable chip control. Therefore it becomes desirable to find a method which can detect the chip form. In this paper, a method of the identification of chip form using output of pyrometer and neural network technique is developed. An efficiency of developed method is examined by experiments in turning and the validity of it is confirmed.

  • PDF

A Study on Optimal Process Conditions for Chip Encapsulation (반도체 칩 캡슐화 공정의 최적조건에 관한 연구)

  • 허용정
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 1995.04b
    • /
    • pp.477-480
    • /
    • 1995
  • Dccisions of optimal filling conditions for the chip encapsulation have been done primarily by an ad hoc use of expertise accumulated over the years because the chip encapsulation process is quite complicated. The current CAE systems do not provide mold designers with necessary knowledge of the chip encapsulation for the successful design of optimal filling except flow simulation capability. There have been no attempts to solve the optimal filling problem in the process of the chip encapsulation. In this paper, we have constructed an design system for optimal filling to avoid short shot in the chip encapsulation process which combines an optimization methodology with CAE software.

  • PDF