• 제목/요약/키워드: C-step

검색결과 3,190건 처리시간 0.037초

저온 열처리 과정에서 일어나는 (0001) α-Al2O3 기판 표면의 형상 변화 (Surface Morphological Evolution of (0001) α-Al2O3 Substrate During Low Temperature Annealing)

  • 이근형
    • 한국전기전자재료학회논문지
    • /
    • 제23권11호
    • /
    • pp.859-863
    • /
    • 2010
  • Evolution of surface morphology of ${\alpha}-Al_2O_3$ substrate was investigated as a function of annealing temperature and time. Commercial (0001) ${\alpha}-Al_2O_3$ single crystal substrates were annealed in the range of $600-1000^{\circ}C$ in air. At $600^{\circ}C$, step-terrace structure started to be formed on the substrate. However, the surface roughness on the terrace was still considerable and a number of islands were observed on the step edges as well as the terraces. As the annealing temperature increased, the islands were absorbed into the step edges. Thus the terraces were smoother and the step edges were more straightened. Well-defined surface with a step height of 0.2 nm was formed above $900^{\circ}C$. On the other hand, when the substrate was annealed at a fixed temperature of $1000^{\circ}C$, the change of surface morphology was observed for the substrate annealed for 10 min. After the annealing for 30 min, the surface on which any islands could not survive was observed.

쌍대반응표면최적화를 위한 가중평균제곱오차 최소화법: 공정능력지수 기반의 가중치 결정 (Weighted Mean Squared Error Minimization Approach to Dual Response Surface Optimization: A Process Capability Indices-Based Weighting Procedure)

  • 정인준
    • 품질경영학회지
    • /
    • 제42권4호
    • /
    • pp.685-700
    • /
    • 2014
  • Purpose: The purpose of this paper is to develop a systematic weighting procedure based on process capability indices method applying weighted mean squared error minimization (WMSE) approach to dual response surface optimization. Methods: The proposed procedure consists of 5 steps. Step 1 is to prepare the alternative vectors. Step 2 is to rank the vectors based on process capability indices in a pairwise manner. Step 3 is to transform the pairwise rankings into the inequalities between the corresponding WMSE values. Step 4 is to obtain the weight value by calculating the inequalities. Or, step 5 is to obtain the weight value by minimizing the total violation amount, in case there is no weight value in step 4. Results: The typical 4 process capability indices, namely, $C_p$, $C_{pk}$, $C_{pm}$, $C_{pmk}$ are utilized for the proposed procedure. Conclusion: The proposed procedure can provide a weight value in WMSE based on the objective quality performance criteria, not on the decision maker's subjective judgments or experiences.

Theoretical Study on the Reaction Mechanism of Azacyclopropenylidene with Epoxypropane: An Insertion Process

  • Tan, Xiaojun;Wang, Weihua;Li, Ping
    • Bulletin of the Korean Chemical Society
    • /
    • 제35권9호
    • /
    • pp.2717-2722
    • /
    • 2014
  • The reaction mechanism between azacyclopropenylidene and epoxypropane has been systematically investigated employing the second-order M${\o}$ller-Plesset perturbation theory (MP2) method to better understand the reactivity of azacyclopropenylidene with four-membered ring compound epoxypropane. Geometry optimization, vibrational analysis, and energy property for the involved stationary points on the potential energy surface have been calculated. It was found that for the first step of this reaction, azacyclopropenylidene can insert into epoxypropane at its C-O or C-C bond to form spiro intermediate IM. It is easier for the azacyclopropenylidene to insert into the C-O bond than the C-C bond. Through the ring-opened step at the C-C bond of azacyclopropenylidene fragment, IM can transfer to product P1, which is named as pathway (1). On the other hand, through the H-transferred step and subsequent ring-opened step at the C-N bond of azacyclopropenylidene fragment, IM can convert to product P2, which is named as pathway (2). From the thermodynamics viewpoint, the P2 characterized by an allene is the dominating product. From the kinetic viewpoint, the pathway (1) of formation to P1 is primary.

대칭키 해독을 위한 아기걸음 2k-ary 성인걸음 알고리즘 (Baby-Step 2k-ary Adult-Step Algorithm for Symmetric-Key Decryption)

  • 이상운
    • 한국인터넷방송통신학회논문지
    • /
    • 제15권2호
    • /
    • pp.23-29
    • /
    • 2015
  • $a^b{\equiv}c$(mod p)에서 a,c,p가 주어졌을 때 b를 구하는 이산대수 문제를 푸는 아기걸음-거인걸음 알고리즘은 p를 $m={\lceil}{\sqrt{p}}{\rceil}$개의 원소를 가진 m개의 블록으로 분할하고 거인 1명이 보폭 m으로 단방향으로만 $a^0$로 걸어가면서 찾는 방법이다. 본 논문은 기본적으로 p를 p/l, $a^l$ > p로 분할하고, 성인 1명이 보폭 l로 단방향으로 걸어가는 방법으로 변형시켰다. 또한, 성인 $2^k$명이 동시에 걸어가면서 b를 빠르게 찾는 방법으로 확장시켰다. 제안된 알고리즘을 $1{\leq}b{\leq}p-1$의 범위에서 $2^k$, (k=2)를 적용한 결과 기본적인 성인걸음수의 1/4로 감소시키는 효과를 얻었다. 결론적으로, 제안된 알고리즘은 아기걸음-거인걸음 알고리즘의 보폭 수를 획기적으로 단축시킬 수 있었다.

한전 배전 계통을 이용한 2단장주의 불평형 부하에 따른 중성선 전류의 영향에 관한 연구 (A Study on the Effects of Neutral Current by Unbalanced Load in Two Step Type Pole using KEPCO's Distribution System)

  • 박건우;서훈철;김철환;정창수;유연표;임용훈;이원정
    • 전기학회논문지
    • /
    • 제56권3호
    • /
    • pp.465-471
    • /
    • 2007
  • The one step type pole and two step type pole are used in KEPCO's distribution system. The neutral current increases in three-phase four-wire distribution system due to unbalanced load. Usually, power line and communication line are installed at contiguity by effect of topography in Korea. To this end, the damages such as electrostatic induction, electromagnetic induction and harmonic induction generated by induced voltage and current are occured in power line and communication line. This paper calculates the neutral current in KEPCO's distribution system using EMTP by composing various simulated conditions. Also, these results are verified by vector analysis.

한전 실 배전계통 모델을 이용한 1단 장주 중성선 전류 계산 (Neutral Current Calculation of the One Step Type Pole using KEPCO's Distribution System)

  • 서훈철;박건우;김철환;정창수;유연표;임용훈;설일호
    • 전기학회논문지
    • /
    • 제56권1호
    • /
    • pp.35-40
    • /
    • 2007
  • The one step type and two step type pole are used in distribution line. If the three phases are not balanced, the communication line can be damaged by induced voltage. This paper calculates the neutral current using KEPCO's distribution system model which is only composed by one step type pole. The used system model is modelled by using ATPDraw and the neutral current is calculated by using EMTP/MODELS. Many cases for abstracting the neutral current characteristics in KEPCO's distribution system are simulated and analyzed.

전기자동차의 쵸퍼제어 방식 (A study on the Chopper Control System of Electroic Vehicle)

  • 정연택;한경희;김용주;이승환;김대균;이완기
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1992년도 하계학술대회 논문집 B
    • /
    • pp.1182-1184
    • /
    • 1992
  • In case of chopper control is used for the d.c motor In the electric vehicle(EV) in general step down chopper is used for the driving and the step-up chopper is used for the regeneration. Bilateral variable ratio chopper system(BVRCS) formed by parallel combination of upper two chopper methods step-down, step-up and step-up/down chopper operations by duty cycle, circuit element and driving condition. In this paper, BVRCS is proposed for the simulated and experimented control of d.c motor in the EV. By the result of simulation BVRCS represents same driving power compared to the step-down and excellent breaking power compared to the step-up chopper system because of the greater motor current.

  • PDF

FPGA Based Micro Step Motor Driver

  • Uk, Cho-Jung;Wook, Jeon-Jae
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 2001년도 ICCAS
    • /
    • pp.111.3-111
    • /
    • 2001
  • Automative system and robot are operated by motor. Recently, automative system and robot need correct operation and control for precise task. Therefore they need precise motor control technology. In present, controller needs precise motor control technology in automative system and robot. Usual step motor driver that has 200 steps per revolution is not proper. So we need micro step motor driver that is more precise then usual step motor driver. In this paper, micro step motor driver is used for precise control of step motor. The goal is precise operation and location control. This micro step motor driver is A3972SB that is made in Alloegro Company. It has serial port that receives two 6-bits linear DAC value. Almost all systems generate DAC value with micro processer and ...

  • PDF

두 단계 열처리에 의해 제작된 다결정 실리콘 박막트랜지스터의 전기적 특성의 분석 (Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors)

  • 최권영;한민구;김용상
    • 대한전기학회논문지
    • /
    • 제45권4호
    • /
    • pp.568-573
    • /
    • 1996
  • The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

  • PDF