• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 1992년도 추계학술발표회논문집
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• pp.25-29
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• 1992

In this paper, The Monte Carlo Simulation is performed in complex geometries which are composed of obstacles intercepted path of photon. Light is assumed to be particle and has particular direction and weighting value. The illuminance distribution is calculated proportional to the summation of weighting values striking area element. The result of simulation is consistent with that of experiments in a few error.

• 한국방사성폐기물학회:학술대회논문집
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• 한국방사성폐기물학회 2005년도 춘계 학술대회
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• pp.352-361
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• 2005

In this study, conventional head-end processes of spent TRISO fuel have been reviewed to develope more effective treatment methods. The main concerns in the TRISO treatment are to effectively separate the carbon and SiC contained in the TRISO particles. The crush-burn scheme which was considered in the early stages of the development has been replaced by the crush-leach process because of $^{14}C$ problems as a second waste during the process. However there are still many obstacles to overcome in the reported processes. Hence, innovative thermomechanical concepts to breach the coating layers of the TRISO particle with a minimized amount of second waste are proposed in this paper and their principles are described in detail.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2009년도 춘계학술대회 논문집
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• pp.164-167
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• 2009

The applications of the aluminum alloy sheets to the auto-body panels are dramatically increasing for weight reduction of the automobiles. However, low formability of the aluminum alloy sheet compare to the steel sheet can be obstacles in tool manufacturing process. Therefore, much of yield criteria for the anisotropic material such as the aluminum alloy sheet have been observed. In this study, the biaxial tensile test and FLD test for the aluminum alloy sheet are performed. The results are compared with Hill's 1948 and Hill's 1990 model by means of theoretical predictions. Finite element analysis also performed using the proposed method for the real panel.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2006년도 춘계종합학술대회
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• pp.701-705
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• 2006

본 논문에서는 바퀴로 구성된 이동 로봇의 슬립 방지를 위한 경로 계획은 제안한다. 제안한 방식은 퍼텐셜 필드 경로 계획에서 척력에 대한 인위적인 힘을 평탄화 시키는 방식이다. 제안한 방식의 유용성을 확인하기 위하여 이동 로봇의 활동 영역에 C-obstacle이 존재하는 경우에 대해 시뮬레이션하여 제안한 방식의 성능이 기존 퍼텐셜 필드 방식보다 우수함을 확인하였다.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2013년도 춘계학술발표대회
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• pp.248-249
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• 2013

This study presents a potential field method for path planning to goal with a mobile robot in unknown environment. The proposed algorithm allows mobile robot to navigate through static obstacles, and find the path in order to reach the target without collision. This algorithm provides the robot with the possibility to move from the initial position to the final position (target). Stage and Player simulator is used to perform the robot motion and implement the potential field algorithm in C/C++ for performance evaluation. Two-dimensional terrain model is used to simulate the ability of robot in motion planning without any collision.

• Journal of Yeungnam Medical Science
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• 제14권1호
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• pp.67-76
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• 1997

항암제에 대한 내성은 내인성 또는 획득한 내성 모두가 암의 치료에 장애가 된다. P-당단백질을 encode하고있는 mdr1 유전자의 발현이 항암제에 대해 내성을 가지고 있는 암세포에서 많이 관찰되고 있으며, 최근에는 시험관적으로 항암제에 대한 내성이 유도된 암세포주들에서 mdr1 유전자가 발현되지 않는 암세포들이 보고되고 있다. 다제내성에 관계하는 또 하나의 유전자인 MRP 발현정도를 L1210세포와 내성인 L1210변이주들에서 조사하였으며, c-myc과 c-fos 유전자의 발현변화를 관찰하였다. RT-PCR을 시행하여 L1210, L1210AdR, L1210VcR에서 MRP 유전자발현을 확인하였으며, Northern hybridization한 결과 L1210세포에 비하여 L1210AdR은 유전자 발현이 40% 정도 감소하였으며, L12l0Cis는 90% 정도의 유전자 발현감소가 관찰되었다. c-myc과 c-fos유전자의 Northern hybridization한 결과 L1210에 비하여 L1210AdR은 발현감소가 나타났으나, L1210VcR과 L1210Cis의 경우는 오히려 발현증가가 관찰되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.128-128
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• 2012

We investigated the atomic and electronic properties of graphene grown by Pd silicidation and intercalation using LEED, STM, and ARPES. Pd was deposited on the 6H-SiC(0001) surface at RT. The formation of Pd silicide gives rise to breaking of Si-C bonds of the SiC crystal, which enables to release C atoms at low temperature. The C atoms are transformed into graphene from $860^{\circ}C$ according to the LEED patterns as a function of annealing temperature. Even though the graphene spots were observed in the LEED pattern and the Fourier transformed STM images after annealing at $870^{\circ}C$, the topography images showed various superstructures so that graphene is covered with Pd silicide residue. After annealing at $950^{\circ}C$, monolayer graphene was revealed at the surface. The growth of graphene is not limited by surface obstacles such as steps and defects. In addition, we observed that six protrusions consisting of the honeycomb network of graphene has same intensity meaning non-broken AB-symmetry of graphene. The ARPES results in the vicinity of K point showed the non-doped linear ${\pi}$ band structure indicating monolayer graphene decoupled from the SiC substrate electronically. Note that the charge neutrality of graphene grown by Pd silicidation and intercalation was sustained regardless of annealing temperature in contrast with quasi-free- standing graphene induced by H and Au intercalation. Further annealing above $1,000^{\circ}C$ accelerates sublimation of the Pd silicide layer underneath graphene. This results in appearance of the $(6r3x6r3)R30^{\circ}$ structure and dissolution of the ${\pi}$ bands for quasi-free-standing graphene.

• 전자공학회논문지 IE
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• 제47권2호
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• pp.32-37
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• 2010

본 연구에서는 초소형화의 욕구와 우수한 신뢰성을 가진 일체형 SMD 인덕터 코어를 개발하기 위하여 전력값에 따른 온도 특성을 분석하였다. 전자부품의 온도가 상승하면 소자의 정상적인 동작을 보장하기 힘든 기능적 장애를 가져오고, 부품의 고장율을 높여 수명을 단축하게 된다. 또한, 열응력이나 열팽창에 의하여 부품에 충격을 주고 오동작을 일으키게 되어 신뢰성에 많은 영향을 미치게 된다. 일체형 SMD Inductor Core를 주위온도와 소자온도 차에 의한 온도상승을 측정하였으며, 각 전력값에 따른 온도 특성을 통해서 안정된 전력값을 얻을 수 있었고, 측정된 직류 전류와 저항 $R_dc$를 이용하여 시뮬레이션한 결과 40[$^{\circ}C$]의 온도 상승분에서 양호한 정격 전류값을 찾을 수 있었다.

• ETRI Journal
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• 제36권2호
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• pp.293-300
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• 2014

As the system-on-chip (SoC) design becomes more complex, the test costs are increasing. One of the main obstacles of a test cost reduction is the limited number of test channels of the ATE while the number of pins in the design increases. To overcome this problem, a new test architecture using a channel sharing compliant with IEEE Standard 1149.1 and 1500 is proposed. It can significantly reduce the pin count for testing a SoC design. The test input data is transmitted using a test access mechanism composed of only input pins. A single test data output pin is used to measure the sink values. The experimental results show that the proposed architecture not only increases the number of sites to be tested simultaneously, but also reduces the test time. In addition, the yield loss owing to the proven contact problems can be reduced. Using the new architecture, it is possible to achieve a large test time and cost reduction for complex SoC designs with negligible design and test overheads.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2006년도 춘계학술대회 논문집
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• pp.547-548
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• 2006

This study focuses on a determination of amount of Pt in the Pt/C for catalysts of polymer electrolyte membrane fuel cells (PEMFC). PEMFC offer low weight and high power density and being considered fur automotive and stationary power applications. The PEMFC behavior is quite complex is influenced by several factors, including catalysts and structure of electrode and membrane type. Catalyst of electrode is important factor for PEMFC. One of the obstacles preventing polymer electrolyte membrane fuel cells from commercialization is the high cost of noble metals to be used as catalyst, such as platinum. To effectively use these metals, they have to be will dispersed to small particles on conductive carbon supports. The optimal amount of Pt in Pt/C was investigated by using polarization curves in single cell with $H_2/O_2$ operation.