• Journal of the Korean Vacuum Society
• /
• v.21 no.1
• /
• pp.6-11
• /
• 2012

In order to understand a process of contaminants removal on surface of Cu seed layer (Cu seed/Ti/Si) by sputter deposition, we investigated the changed morphology and states of Cu seed surface after pretreatment in alkali degreasing Metex TS-40A solution according to dipping time. After TS-40A pretreatment, the surface morphology with clearer grains was observed by Field emission scanning electron microscope and the changed surface chemical states and impurities on surface of samples were checked by X-ray photoelectron spectroscopy. Dipping time in TS-40A solution had very little effect on surface of Cu seed layer. After pretreatment, much carbons and little oxygens on surface of Cu seed were eliminated and the decrease of peaks corresponded to O=C and $Cu(OH)_2$ was estimated. However, Si content (=silicate) was detected on sample surface. We think that the silicate impurity forms on Cu seed by chemical reaction of TS-40A solution included silicate component. By pretreatment of alkali degreasing Metex TS-40A solution, it showed an excellent effect in removal of O=C and $Cu(OH)_2$ on Cu seed layer, but the silicate was formed on surface of Cu seed. Therefore, another cleaning process such as acid cleaning is required for removal of this silicate in use of this alkali degreasing.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.02a
• /
• pp.338-338
• /
• 2013

Monolithic three-dimensional integrated circuits (3D-ICs) 구현 시 bonding 과정에서 발생되는 aluminum (Al) 이나 copper (Cu) 등의 interconnect metal의 확산, 열적 스트레스, 결함의 발생, 도펀트 재분포와 같은 문제들을 피하기 위해서는 저온 공정이 필수적이다. 지금까지는 polymer 기반의 bonding이나 Cu/Cu와 같은 metal 기반의 bonding 등과 같은 저온 bonding 방법이 연구되어 왔다. 그러나 이와 같은 bonding 공정들은 공정 시 void와 같은 문제가 발생하거나 공정을 위한 특수한 장비가 필수적이다. 반면, 두 물질의 합금을 이용해 녹는점을 낮추는 eutectic bonding 공정은 저온에서 공정이 가능할 뿐만 아니라 void의 발생 없이 강한 bonding 강도를 얻을 수 있다. Aluminum-germanium (Al-Ge) 및 aluminum-indium (Al-In) 등의 조합이 eutectic bonding에 이용되어 각각 $424^{\circ}C$ 및 $454^{\circ}C$의 저온 공정을 성취하였으나 여전히 $400^{\circ}C$이상의 eutectic 온도로 인해 3D-ICs의 구현 시에는 적용이 불가능하다. 이러한 metal 조합들에 비해 indium (In)과 tin (Sn)은 각각 $156^{\circ}C$ 및 $232^{\circ}C$로 굉장히 낮은 녹는점을 가지고 있기 때문에 In-Sn 조합은 약 $120^{\circ}C$ 정도의 상당히 낮은eutectic 온도를 갖는다. 따라서 본 연구팀은 In-Sn 조합을 이용하여 $200^{\circ}C$ 이하에서monolithic 3D-IC 구현 시 사용될 eutectic bonding 공정을 개발하였다. 100 nm SiO2가 증착된 Si wafer 위에 50 nm Ti 및 410 nm In을 증착하고, 다른Si wafer 위에 50 nm Ti 및 500 nm Sn을 증착하였다. Ti는 adhesion 향상 및 diffusion barrier 역할을 위해 증착되었다. In과 Sn의 두께는 binary phase diagram을 통해 In-Sn의 eutectic 온도인 $120^{\circ}C$ 지점의 조성 비율인 48 at% Sn과 52 at% In에 해당되는 410 nm (In) 그리고 500 nm (Sn)로 결정되었다. Bonding은 Tbon-100 장비를 이용하여 $140^{\circ}C$, $170^{\circ}C$ 그리고 $200^{\circ}C$에서 2,000 N의 압력으로 진행되었으며 각각의 샘플들은 scanning electron microscope (SEM)을 통해 확인된 후, 접합 강도 테스트를 진행하였다. 추가로 bonding 층의 In 및 Sn 분포를 확인하기 위하여 Si wafer 위에 Ti/In/Sn/Ti를 차례로 증착시킨 뒤 bonding 조건과 같은 온도에서 열처리하고secondary ion mass spectrometry (SIMS) profile 분석을 시행하였다. 결론적으로 본 연구를 통하여 충분히 높은 접합 강도를 갖는 In-Sn eutectic bonding 공정을 $140^{\circ}C$의 낮은 공정온도에서 성공적으로 개발하였다.

• Journal of Sensor Science and Technology
• /
• v.6 no.5
• /
• pp.407-413
• /
• 1997

The crystallized CuPc(copper phthalocyanine) film on a p-type <100> Si substrate is prepared at the substrate temperature of $300^{\circ}C$ by thermal evaporation. X -ray diffraction analysis showed the CuPc film to have a-axis oriented structure. For the measurement of photovoltaic characteristics of the CuPc/Si film and the Si substrate, a transverse current-voltage (I-V) curve is observed. In the dark, the Au/Si junction is shown to be ohmic contact. However, under illumination, a photovoltaic effect is not observed. The I-V curve in the dark indicates that the CuPc film on Si may form an ohmic contact. Since the CuPc film is a p-type semiconductor, the CuPc/p-Si junction has no barrier at the interface. Under illumination, the CuPc/Si junction shows a large photocurrent comparing with that of the wafer. The result indicates that the CuPc layer plays an important role in the photocarrier generation under red illumination (600 nm). The CuPc/Si film shows the photo voltaic characteristics with a short-circuit photocurrent ($J_{sc}$) of $4.29\;mA/cm^{2}$ and an open-circuit voltage ($V_{oc}$) of 12 mA.

• Journal of the Korean Vacuum Society
• /
• v.9 no.3
• /
• pp.267-272
• /
• 2000

Electroplating Cu was deposited on Si(100) wafer after seed Cu was deposited by sputtering first. TaN was deposited as a diffusion barrier before depositing the seed Cu. Electroplating Cu thin films show highly (111)-oriented microstructure for both before and after annealing at $450^{\circ}C$ for 30min and no copper silicide was detected in the same samples, which indicates that TaN barrier layer blocks well the Cu diffusion into silicon substrate. After annealing the electroplating Cu film up to $450^{\circ}C$, the Cu film became columnar from non-columnar, its grain size became larger about two times, and also defects density of stacking faults, twins and dislocations decreased greatly. Thus the heat treatment will improve significantly electromigration property caused by the grain boundary in the Cu thin films.

• Journal of the Korean Ceramic Society
• /
• v.29 no.5
• /
• pp.383-390
• /
• 1992

We investigated the effect of substrate on the properties of the Ni-Zn-Cu ferrite thin films deposited on SiO2 (1000∼3000${\AA}$) / Si (100) substrate at various conditions by rf magnetron sputtering. A disktype Ni-Zn-Cu ferrite sintered by conventional ceramic process and argon gas were used as a target and a sputtering gas, repectively. The compositions of the thin films measured by EPMA were similar to target composition (Fe: 65.8 at%, Ni: 12.7 at%, Cu: 6.7 at%, Zn: 14.8 at%) irrespective of substrate temperature. Amorphous thin films were deposited when substrate was not intentionally heated, but the films came to crystallize with increasing substrate temperature, and crystalline thin films were deposited at substrate temperature above 200$^{\circ}C$. Below 250$^{\circ}C$ saturation magnetization (Ms), remanence (Mr) and coercivity (Hc) of the ferrite thin film increased with the substrate temperature due to the increase of grain size and the improvement of crystallinity. And above 250$^{\circ}C$, Ms, Mr increased slightly, but Hc of the amorphous thin films increased due to crystallization, whereas that of the crystalline thin films decreased because of grain growth and stress release.

• Korean Journal of Materials Research
• /
• v.11 no.3
• /
• pp.185-190
• /
• 2001

The effect of neutral ligand(L) on the precursor characteristics of (hfac)Cu(I)-L and on Cu MOCVD Process was studied. The neutral ligands of (hac)Cu(I)-L$_{x}$, such as ATMS(allytrimethylsilane), VTMS(vinyltrimethylsilane), VCH(vinylcyclohexane), MP(4-methyl-1-pentene), ACP(allylcyclopentane), and DMB(3,3-dimethyl-1-butene) were investigated. When the dissociation temperature of Cu(I)-L bond is low, low temperature deposition below $100^{\circ}C$ is possible and the resistivity of the film is low. But thermal stability of the precursor is low in this case. The resistivity is almost the same regardless of L at the deposition temperature range of $125~175^{\circ}C$. The resistivity is increased as the molecular weight of L becomes higher above $225^{\circ}C$ The vapor pressure of the precursor was closely related to the boiling point of L, the lower the boiling point of L, the higher the vapor pressurere.

• Journal of the Korean Vacuum Society
• /
• v.17 no.6
• /
• pp.518-522
• /
• 2008

The miniaturization of device size and multilevel interlayers have been developed by ULSI circuit devices. These submicron processes cause serious problems in conventional metallization due to the solubility of silicon and metal at the interface, such as an increasing contact resistance in the contact hole and interdiffusion between metal and silicon. Therefore it is necessary to implement a barrier layer between Si and metal. Thus, the size of multilevel interconnection of ULSI devices is critical metallization schemes, and it is necessary reduce the RC time delay for device speed performance. So it is tendency to study the Cu metallization for interconnect of semiconductor processes. However, at the submicron process the interaction between Si and Cu is so strong and detrimental to the electrical performance of Si even at temperatures below $200^{\circ}C$. Thus, we suggest the tungsten-carbon-nitrogen (W-C-N) thin film for Cu diffusion barrier characterized by nano scale indentation system. Nano-indentation system was proposed as an in-situ and nanometer-order local stress analysis technique.

• Korean Journal of Materials Research
• /
• v.17 no.9
• /
• pp.463-468
• /
• 2007

The interdiffusion characteristics of Cu-plug/Capping Layer/NiSi contacts were investigated. Capping layers were deposited on Ni/Si to form thermally-stable NiSi and then were utilized as diffusion barriers between Cu/NiSi contacts. Four different capping layers such as Ti, Ta, TiN, and TaN with varying thickness from 20 to 100 nm were employed. When Cu/NiSi contacts without barrier layers were furnace-annealed at $400^{\circ}C$ for 40 min., Cu diffused to the NiSi layer and formed $Cu_3Si$, and thus the NiSi layer was dissociated. But for Cu/Capping Layers/NiSi, the Cu diffusion was completely suppressed for all cases. But Ni was found to diffuse into the Cu layer to form the Cu-Ni(30at.%) solid solution, regardless of material and thickness of capping layers. The source of Ni was attributed to the unreacted Ni after the silicidation heat-treatment, and the excess Ni generated by the transformation of $Ni_2Si$ to NiSi during long furnace-annealing.

• Journal of the Microelectronics and Packaging Society
• /
• v.17 no.4
• /
• pp.61-66
• /
• 2010

Cu-Cu thermo-compression bonding process was successfully developed as functions of the deposited Cu thickness and $Ar+H_2$ forming gas annealing conditions before and after bonding step in order to find the low temperature bonding conditions of 3-D integrated technology where the interfacial toughness was measured by 4-point bending test. Pre-annealing with $Ar+H_2$ gas at $300^{\circ}C$ is effective to achieve enough interfacial adhesion energy irrespective of Cu film thickness. Successful Cu-Cu bonding process achieved in this study results in delamination at $Ta/SiO_2$ interface rather than Cu/Cu interface.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.36D no.3
• /
• pp.59-65
• /
• 1999

In this paper, we had studied the possibility of application as Cu thin films from (hfac)Cu(VTMOS) which is very stable. Cu thin films had been studied as a function of deposition temperature. Substrates used in the experiment were PVD TiN on Si wafer. Deposition conditions were as follow : deposition temperature $50^{\circ}C$. Cu thin films were analyzed by AES, four point probe, XRD and SEM. All of deposited films were very pure and some favoring of <111> planes perpendicular to the substrate surface were observed. Cu thin films had two distinct growth rates at various deposition temperature. One is the surface reaction limited region below $200^{\circ}C$, and the other is the mass transport limited region above $200^{\circ}C$. The resistivity of deposited Cu thin films under the optimum deposition condition is $2.5mu\Omega.cm$ Thus, properties of deposited Cu thin films using (hfac)Cu(VTMOS) didn't show difference with Cu thin films from other precursors.