• Proceedings of the KIEE Conference
• /
• 2006.04a
• /
• pp.57-59
• /
• 2006

In this paper, we investigate the wireless TCP protocol for throughput improvement in wireless Broadband. If the burst error duration of a wireless link is significantly long, retransmissions of lost packets by Snoop TCP are fulfilled mainly not by the receipt of duplicate acknowledgement (DUPACKs) but by local timer expiration. With the proposed scheme, Snoop TCP recovers packet losses fast by shortening the interval of local retransmissions based on the channel status. From the simulation results, we can show that the proposed scheme can improve TCP throughput considerably.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.10B
• /
• pp.1744-1759
• /
• 2000

In this paper a synchronized stream cryptosystem for secure link layer communication on a radio channel is designed. We have proposed new interleaving schemes to randomize a burst error and experimented with different types of interleaving schemes. The proposed techniques of interleaving schemes are : (1) interleaving scheme based on frame(2) interleaving scheme based on group. The proposed schemes are very robust in randomizing

• Proceedings of the Korean Institute of Communication Sciences Conference
• /
• 1984.10a
• /
• pp.11-14
• /
• 1984

When the received sequence is not identical to the transmitted code word due to the channel nose effect, it is necessary to detect and correct errors. In this paper, it is shown how to construct the encoder and the decoder using cyclic product codes. this system combines random and burst error correction and is easily decodable. Performance has been obtained as expected.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.23 no.5
• /
• pp.719-725
• /
• 1986

Reed-solomon(R-S) code is very effective to coerrect both random and burst errors over a noise communication channel. However, the required hardware is very complex if the B/M algorithm was employed. Moreover, when the error correction system consists of two R-S decoder and de-interleave, the I/O data bns lines becomes 9bits because of an erasure flag bit. Thus, it increases the complexity of hardware. This paper describes the R-S decoder which consisits of a error correction section that uses a direct decoding algorithm and erasure generation section and a erasure generation section which does not use the erasure flag bit. It can be shown that the proposed R-S dicoder is very effective in reducing the size of required hardware for error correction.

• Journal of the Institute of Convergence Signal Processing
• /
• v.6 no.2
• /
• pp.95-99
• /
• 2005

This paper presents an accurate recovery method of the reference clock which is needed for network synchronization in two-way satellite multimedia systems compliant with DVB-RCS specification and which use closed loop method for burst synchronization. In these systems, the remote station transmits TDMA burst via return link. For burst synchronization, it obtains reference clock from program clock reference (PCR) defined by MPEG-2 system specification. The PCR is generated periodically at the hub system by sampling system clock which runs at 27MHz $\pm$ 30ppm. Since the reference clock is recovered by means of digital PLL(DPLL) using imprecise PCR values due to variable random jitter, the recovered clock frequency of remote station doesn't exactly match reference clock of hub station. We propose a robust recovery method of reference clock against random delay jitter The simulation results show that the recovery error is remarkably decreased from 5 clocks to 1 clock of 27MHz relative to the general DPLL recovery method.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.21 no.4
• /
• pp.984-995
• /
• 1996

Data errors according to the various noises caused in the satellite communication links are corrected by the Viterbi decoding algorithm which has extreme error correcting capability. In this paper, we designed and implemented a convolutional encoder and Viterbi decoder ASIC which is used to encode the input data at the transmit side and correct the errors of the received data at the receive side for use in the VSAT communication system. And this chip may be used in any BPSK, QPSK, or OQPSK transmission system. The ambiguity resolver corrects PSK modem ambiguities by delaying, interting, and/or exchanging code symbol to restore their original sequence and polarity. In case of previous decoding system, ambiguity state(AS) of data is resolved by external control logic and extra redundancy data are needed to resolve AS. But, by adopting decoder proposed in this paper, As of data is resolved automatically by internal logic of decoder in case of continuous mode, and by external As line withoug extra redudancy data in burst mode case. So, decoding parts are simple in continuous mode and transmission efficiency is increased in bust mode. The features of this chip are full duplex operation with independent transmit and receive control and clocks, start/stop inputs for use in burst mode systems, loopback function to verify encoder and decoder, and internal or external control to resolve ambinguity state. For verification of the function and performance of a fabricated ASIC chip, we equiped this chip in the Central and Remote Earth Station of VSAT system, and did the performance test using the commerical INTELSAT VII under the real satellite link environmens. The results of test were demonstrated the superiority of performance.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.38 no.10
• /
• pp.721-727
• /
• 2001

In this paper, we propose a two-dimensional interleaving structure of holographic digital data storage. In this storage, many of the digital binary data are recorded, retrieved and processed in a two-dimensional data image (1000$\times$1000 bits). Therefore, burst errors in this digital device also have two-dimensional characteristics and it is required to use effective two-dimensional interleaving to overcome them. Bits of every code word should be distributed in an equilateral triangular lattice structure when they are scattered considering the random shape and occurrence of burst errors. We deal with factors and algorithm to construct this interleaving structure of equilateral triangular lattice.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.8C
• /
• pp.1125-1132
• /
• 2004

In this Paper, we Propose an effective boundary matching based error detection algorithm using causal neighbor blocks to improve video quality degraded from channel error in block-coded video. The proposed algorithm first calculates boundary mismatch powers between a current block and each of its causal neighbor blocks. It then decides that a current block should be normal if all the mismatch powers are less than an adaptive threshold, which is adaptively determined using the statistics of the two adjacent blocks. In some experiments under the environment of 16bi1s burst error at bit error rates (BERs) of 10$^{-3}$ -10$^{-4}$ , it is shown that the proposed algorithm yields the improvements of maximum 20% in error detection rate and of maximum 3.5㏈ in PSNR of concealed kames, compared with Zeng's error detection algorithm.

• Journal of Digital Convergence
• /
• v.13 no.10
• /
• pp.319-325
• /
• 2015

We proposed the blocking channel to reduce the performance decrease using the low correlation with cyclic delay scheme in LED-ID system. LED-ID is based on the visible light to transmit the data. However, It is occurred the block channel by structure or environment of indoor for light of straightness. LED-ID system is degraded the performance by the block channel as loss of data, and burst error. To solve the block channel, the proposed system is overcome the burst error by low correlation among data, which is able to obtain the maximize time diversity gain to improve the performance of BER by cyclic delay scheme. The BER performance is evaluated by computer simulation according to channel parameter. The simulation results shows that proposed system gives much better performance than conventional system and constant cyclic delay scheme system.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.3A
• /
• pp.383-390
• /
• 2000

In this paper, an adaptive power control algorithm in the DS/CDMA system is proposed. The currently used transmitter/receiver based on IS-95 and the radio propagation channel under mobile communication environments are modeled. Theses are the key features for the simulation to analyse the performance of power control. the distribution of the received SIR(signal to interference ratio)and the bit error probability are the required parameters for the performance analysis. Furthermore the influence of the power control command error on the above parameters are analyzed. By using the performance analysis of IS-95 and the occurrence of burst errors that is characteristic for wireless channels. the new power control algorithm is proposed. The proposed power control algorithm increases the SIR which results in a better service quality and an enhancement in the system capacity.