• Journal of the Korea Society of Computer and Information
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• v.14 no.10
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• pp.101-110
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• 2009

The 6LoWPAN(IPv6 Low-power Wireless Personal Area Network) performs IPv6 header compression, TCP/UDP/IGMP header compression, packet fragmentation and re-assemble to transmit IPv6 packet over IEEE 802,15.4 MAC/PHY. However, from the point of view of security. It has the existing security threats issued by IP packet fragmenting and reassembling, and new security threats issued by 6LoWPAN packet fragmenting and reassembling would be introduced additionally. If fragmented packets are retransmitted by replay attacks frequently, sensor nodes will be confronted with the communication disruption. This paper analysis security threats introduced by 6LoWPAN fragmenting and reassembling, and proposes a re-transmission mechanism that could minimize re-transmission to be issued by replay attacks. Re-transmission procedure and fragmented packet structure based on the 6LoWPAN standard(RFC4944) are designed. We estimate also re-transmission delay of the proposed mechanism. The mechanism utilizes timestamp, nonce, and checksum to protect replay attacks. It could minimize reassemble buffer overflow, waste of computing resource, node rebooting etc., by removing packet fragmentation and reassemble unnecessary.

• Journal of IKEEE
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• v.27 no.4
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• pp.683-686
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• 2023

In this paper, we designed a Delayed Dual Core Lock-Step (D-DCLS) processor where two cores operate same instructions with delay and the result is compared to mitigate soft errors and common mode failures in automotive electronic systems. Because D-DCLS does not know which core an error occurred in, each core must be recovered to the point before the error occurred, but complex hardware modifications are required to return all intermediate values on the pipeline stage. In this paper, in order for easy hardware implementation, all register values are saved to a buffer whenever a branch instruction is executed. When an error is detected, the saved register values are automatically restored, and then 'BX LR' instruction is executed to return to the last branch point. The proposed D-DCLS processor was designed using Verilog HDL and was confirmed to continue normal operation after automatically recovering error.

• Journal of Life Science
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• v.26 no.4
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• pp.453-459
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• 2016

Agarases are classified into α-agarase and β-agarase that produce agarooligosaccharides and neoagarooligosaccharides, respectively. Neoagarooligosaccharides have whitening effect of skin, delay of starch degradation, and inhibition of bacterial growth etc. Hence, the object of this study was to isolate a novel agarase producing marine bacterium and characterization of its β-agarase. A novel agar-degrading bacterium was isolated from seashore of Namhae at Gyeongnamprovine, Korea and purely cultured with Marine agar 2216 media. The isolated bacterium was identified as Simiduia sp. SH-4 after 16S rRNA gene sequencing. The enzymatic sample was obtained from culture media of Simiduia sp. SH-4. Enzymatic activity was highly increased from 20(30% relative activity) to 30℃ (100%) and decreased from 30 to 40℃(75%) and so more. Relative activity was 100% at pH 6 while those were about 91% and 59% at pH 5.0 and 7.0, respectively, meaning the enzyme possesses narrow optimal pH range. Hence, the enzyme exhibited the maximal activity with 120.4 units/l at pH 6.0 and 30℃ in 20 mM Tris-HCl buffer. Thin layer chromatography (TLC) analysis showed that Simiduia sp. SH-4 produces β-agarase, which hydrolyze agarose to produce biofunctional neoagarooligosaccharides such as neoagarotetraose and neoagarobiose. Hence, broad applications would be possible using Simiduia sp. SH-4 and its enzyme in the food industry, cosmetics and medical fields.

• The Transactions of the Korea Information Processing Society
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• v.4 no.1
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• pp.237-245
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• 1997

In this paper, a flow control mechanism is proposed which is based on the priority control between communication path of a node. In this scheme, demanding length of a data queue for any pre-defined, then each node in that path is forced to maintains buffer size under the limit by controlling priority level of the path. The communication path which requires higher bandwidth sets its demanding queue length smaller. By providing relationship between the priority of a path and length of its queue, the high bandwidth requesting path has a better chance to get high bandwidth by defining the smaller demanding queue size. And also, by forcing a path which has high flow rate to maintain small queue size in the path of the communication, the scheme keep the transmission delay of the path small. The size of the demanding queue of a path is regularly adjusted to meet the applications requirement, and the load status of the network during the life time of the communication. The priority control based on the demanding queue size is also provided in the intermediate nodes as well as the end nodes. By that the flow control can provide a quicker result than end to-end flow control, it provides better performance advantage especially for the high speed network.

• Journal of KIISE:Information Networking
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• v.35 no.3
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• pp.173-182
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• 2008

Promoting quality of streaming service in wireless networks has attracted intensive research over the years. Instable wireless channel condition causes high transmission delay and packet loss, due to fading and interference. Therefore, they lead to degrade quality of video streaming service. The IEEE 802.11 Working Group is currently working on a new standard called IEEE 802.11e to support quality of service in WLANs. And several schemes were proposed in order to guarantee QoS. However, they are not adaptable to network condition. Accordingly, they suffered video quality degradation, due to buffer overflow or packet loss. In this paper, to promote quality of video streaming service in WLANs, we propose a cross-layer architecture based on IEEE 802.11e EDCA model. Our cross-layer architecture provides differentiated transmission mechanism of IEEE 802.11e EDCA based on priority of MPEG-4 video frames and adaptively controls the transmission rate by dropping video frames through the efficient bandwidth estimation based on distinction of each AC. Through the simulation, proposed scheme is shown to be able to improve end-to-end qualify for video streaming service in WLANs.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.5
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• pp.292-303
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• 2010

On-chip cache memories play an important role in both performance and energy consumption points of view in resource-constrained embedded systems by filtering many off-chip memory accesses. We propose a 2-level data cache architecture with a low energy-delay product tailored for the embedded systems. The L1 data cache is small and direct-mapped, and employs a write-through policy. In contrast, the L2 data cache is set-associative and adopts a write-back policy. Consequently, the L1 data cache is accessed in one cycle and is able to provide high cache bandwidth while the L2 data cache is effective in reducing global miss rate. To reduce the penalty of high miss rate caused by the small L1 cache and power consumption of address generation, we propose an ECP(Early Cache hit Predictor) scheme. The ECP predicts if the L1 cache has the requested data using both fast address generation and L1 cache hit prediction. To reduce high energy cost of accessing the L2 data cache due to heavy write-through traffic from the write buffer laid between the two cache levels, we propose a one-way write scheme. From our simulation-based experiments using a cycle-accurate simulator and embedded benchmarks, the proposed 2-level data cache architecture shows average 3.6% and 50% improvements in overall system performance and the data cache energy consumption.

• Journal of KIISE:Information Networking
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• v.36 no.6
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• pp.492-504
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• 2009

The delivery of multimedia that efficiently adapts its bit-rate to changing network characteristics and conditions is one of the important challenging tasks in the design of today's real-time multimedia streaming systems such as IPTV, Mobile IPTV and so on. In these work, the primary focus is on network congestion, to improve network stability and inter-protocol fairness. However, these existing works have problems which do not support QoE (Quality of Experience), because they did not consider essential characteristics of contents playback such as the media continuity. In this paper, we propose a novel rate control scheme for improving the QoE of multimedia streaming service in the Internet congestion, called NCAR (Network and Client-Aware Rate control), which is based on network-aware congestion control and client-aware flow control scheme. Network-aware congestion control of the NCAR offers an improving reliability and fairness of multimedia streaming, and reduces the rate oscillation as well as keeping high link utilization. Client-aware flow control of NCAR offers a removing the media discontinuity and a suitable receiver buffer allocation, and provides a good combination of low playback delay. Simulation results demonstrate the effectiveness of our proposed schemes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4B
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• pp.323-332
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• 2006

In this paper, we consider a WDM based metro ring connecting broadband access networks by using FT-TR (Fixed Transmitter-Tunable Receiver) type access nodes and a new MAC protocol for fair transmission is proposed. The basic channel access scheme is CSMA/CA(Carrier Sense Multiple Access with Collision Avoidance) and the transferred optical slot is changed to be empty slot by SS(Source-Stripping) which drops a packet from ring-rotated slot. This empty slot can be either used to send head-of-line packet in buffer or transmitted to next access node. In former cases, there is the improvement of network throughput, but latter case leads unfairness problem of transmission. Thus the proposed MAC protocol exploits the advantages form tow cases. It gives downstream access nodes chance to use empty slots and limits the unconditional usage of empty slots at upstream access nodes with probability as called p-Persistent MAC protocol. We use a numerical analysis to evaluate bandwidth efficiency and maximum node throughput and compares simulation results in terms of node throughput, fairness factor, transfer delay depending on probability. Under two different FT-TR type architectures for metro ring network the proposed MAC protocol is evaluated and compared.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.1-8
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• 2005

An area-efficient DC-DC voltage up-converter in a poly-Si TFT technology for system-on-glass is described which provides low-ripple output. The voltage up-converter is composed of charge-pumping circuit, comparator with threshold voltage mismatch compensation, oscillator, buffer, and delay circuit for multi-phase clock generation. The low ripple output is obtained by multi-phase clocking without increasing neither clock frequency nor filtering capacitor The measurement results have shown that the ripple on the output voltage with 4-phase clocking is 123mV, while Dickson and conventional cross-coupled charge pump has 590mV and 215mV voltage ripple, respectively, for $Rout=100k\Omega$, Cout-100pF, and fclk=1MHz. The filtering capacitor required for 50mV ripple voltage is 1029pF and 575pF for Dickson and conventional cross-coupled structure, for Iout=100uA, and fclk=1MHz, while the proposed multi-phase clocking DC-DC converter with 4-phase and 6-phase clocking requires only 290pF and 157pF, respectively. The efficiency of conventional and the multi-phase clocking DC-DC converter with 4-phase clocking is $65.7\%\;and\;65.3\%$, respectively, while Dickson charge pump has $59\%$ efficiency.

• Journal of the Korean Vacuum Society
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• v.7 no.4
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• pp.368-373
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• 1998

As device dimensions approach submicrometer size in ULSI, the demand for interlayer dielectric materials with very low dielectric constant is increased to solve problems of RC delay caused by increase in parasitic resistance and capacitance in multilevel interconnectins. Fluorinated amorphous carbon in one of the promising materials in ULSI for the interlayer dielectric films with low dielectric constant. However, poor thermal stability and adhesion with Si substrates have inhibited its use. Recently, amorphous hydrogenated carbon (a-C:H) film as a buffer layer between the Si substrate and a-C:F has been introduced because it improves the adhesion with Si substrate. In this study, therfore, a-C:F/a-C:H films were deposited on p-type Si(100) by ECRCVD from $C_2F_6, CH_4$and $H_2$gas source and investigated the effect of forward power and composition on the thickness, chemical bonding state, dielectric constant, surface morphology and roughness of a-C:F films as an interlayer dielectric for ULSI. SEM, FT-IR, XPS, C-V meter and AFM were used for determination of each properties. The dielectric constant in the a-C:F/a-C:H films were found to decrease with increasing fluorine content. However, the dielectric constant increased after furnace annealing in $N_2$atomosphere at $400^{\circ}C$ for 1hour due to decreasing of flurorine content. However, the dielectric constant increased after furnace annealing in $N_2$atmosphere at $400^{\circ}C$ for 1hour due to decreasing of fluorine concentration.