• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.9
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• pp.1209-1218
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• 1995

In this paper, we develope an ATM switch simulator in order to evaluate the HAN/B-ISDN ATM switch currently being developed by ETRI. It models the basic cell switching functions of the target ATM switch with priority control and multicasting features and it also supports such various traffic models as random or bursty traffic, balanced or unbalanced traffic, multicast traffic models. Using this simulator, we can evaluate the performances of the ATM switch in terms of various performance indices, i.e. cell delay, cell loss probability, etc., and this simulator can be utilized in the system parameter tunings such as the common buffer size and address buffer size.

• Journal of the Korean Mathematical Society
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• v.32 no.2
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• pp.211-236
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• 1995

The purpose of this paper is to provide a transient diffusion approximation of queue size distribution for M/G/m/N system. The M/G/m/N system can be expressed as follows. The interarrival times of customers are exponential and the service times of customers have general distribution. The system can hold at most a total of N customers (including the customers in service) and any further arriving customers will be refused entry to the system and will depart immediately without service. The queueing system with finite capacity is more practical model than queueing system with infinite capacity. For example, in the design of a computer system one of the important problems is how much capacity is required for a buffer memory. It its capacity is too little, then overflow of customers (jobs) occurs frequently in heavy traffic and the performance of system deteriorates rapidly. On the other hand, if its capacity is too large, then most buffer memories remain unused.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.302-305
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• 2003

3GPP RLC protocol specification adopted an error control scheme based on selective repeat ARQ. In the 3GPP ARQ, distinctive windows are provided at transmitting and receiving stations so that those stations are prohibited to send or receive data PDU's out of window. An increase in window size enhances delay performance. Such an increase, however, raises the occupancy at re-ordering buffer, which results in a long re-ordering time. Aiming at suppressing the occupancy at re-ordering buffer, we propose partial go back N scheme in this paper In the partial go back N scheme, the receiving station regards all data PDU's between the first (lowest sequence numbered) error-detected PDU and last (highest sequence numbered) error-detected PDU. By the employment of the partial go back N scheme, the occupancy at the re-ordering buffer is apparently reduced, while the delay and throughput performance may be degraded due to the remaining properties of go back N. We thus consider peak occupancy of re-ordering buffer, mean sojourn time at re-ordering buffer, mean delay time, and maximum throughput as measures to evaluate tile proposed scheme and investigate such performance by using a simulation method. From numerical examples, we observe a trade-off among performance measures and conclude that the partial go back N scheme is able to effectively reduce the occupancy of re-ordering buffer.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.12
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• pp.2835-2842
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• 2013

In this paper, service differentiation scheme using optical buffer that is reduced in size with slow-light technology in optical burst switching networks is presented. In suggested scheme, each outport has buffer to store high-class burst only in case that all its wavelengths are occupied. When all wavelengths are being used, a new arriving high-class burst goes into the buffer and waits until a burst is serviced. As soon as a burst is serviced with a wavelength, the high-class burst at buffer is allocated to the free wavelength. In case that low-class burst is arriving under the same situation, it is not stored at the buffer but discarded. An analytical model is derived to analyze the performance of the suggested scheme and compare its performance with the conventional scheme such as preemption and deflection as well as no service differentiations.

• International Journal of Computer Science & Network Security
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• v.23 no.1
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• pp.153-163
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• 2023

This study is situated in the context of intelligent transport systems, where in-vehicle devices assist drivers to avoid accidents and therefore improve road safety. The vehicles present in a given area form an ad' hoc network of vehicles called vehicular ad' hoc network. In this type of network, the nodes are mobile vehicles and the messages exchanged are messages to warn about obstacles that may hinder the correct driving. Node mobilities make it impossible for inter-node communication to be end-to-end. Recognizing this characteristic has led to delay-tolerant vehicular networks. Embedded devices have small buffers (memory) to hold messages that a node needs to transmit when no other node is within its visibility range for transmission. The performance of a vehicular delay-tolerant network is closely tied to the successful management of the nodes' transit buffer. In this paper, we propose a message transit buffer management model for nodes in vehicular delay tolerant networks. This model consists in setting up, on the one hand, a policy of dropping messages from the buffer when the buffer is full and must receive a new message. This drop policy is based on the concept of intermediate node to destination, queues and priority class of service. It is also based on the properties of the message (size, weight, number of hops, number of replications, remaining time-to-live, etc.). On the other hand, the model defines the policy for selecting the message to be transmitted. The proposed model was evaluated with the ONE opportunistic network simulator based on a 4000m x 4000m area of downtown Bouaké in Côte d'Ivoire. The map data were imported using the Open Street Map tool. The results obtained show that our model improves the delivery ratio of security alert messages, reduces their delivery delay and network overload compared to the existing model. This improvement in communication within a network of vehicles can contribute to the improvement of road safety.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.108-116
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• 2013

The input buffer in Network on Chip (NoC) router plays a key role in on-chip-network performance, which is utilized in flow control and virtual channel. However, increase in area and power due to input buffers as the network size gets larger is becoming severe. To solve this problem, a bufferless deflection routing without input buffer was suggested. Since the bufferless deflection routing shows poor performance at high network load, other approaches which combine the deflection routing with small size side buffers were also proposed. Nonetheless these new methods still show deficiencies caused by frequent path collisions. In this paper, we propose a modified deflection routing technique using a location based priority. In comparison with existing deflection routers, experimental results show improvement by 12% in throughput with only 3% increase in area.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.523-524
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• 2008

Proposed battery charger is a economic candidate because that is simple and small size. The circuit has linearly operational power stage. That use small size buffer with small driving current and large power MOS gate capacitance. The simulation result show that charging current is stable and has low ripple.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4A
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• pp.489-495
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• 2000

In this paper we propose an approximate method to estimate the cell loss probability(CLP) due to buffer overflow in ATM networks. The main idea is to relate the buffer capacity with the CLP target in explicit formula by using the approximate upper bound for the tail distribution of a queue. The significance of the proposition lies in the fact that we can obtain the expected CLP by using only the source traffic data represented by mean rate and its variance. To that purpose we consider the problem of estimating the cell loss measures form the statistical viewpoint such that the probability of cell loss due to buffer overflow does not exceed a target value. In obtaining the exact solution we use a typical matrix analytic method for GI/D/1B queue where B is the queue size. Finally, in order to investigate the accuracy of the result, we present both the approximate and exact results of the numerical computation and give some discussion.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.135-138
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• 2004

Mobile phone antenna needs a small size and light weight for carrying and handling. In case of receiving a wide band TV signal, it would be difficult to obtain a good impedance matching between the antenna and the circuit due to a large capacitive reactance of antenna. Buffer amplifier was established on the teflon( ${\varepsilon}_r=3.38$, h=20mils) substrate by using GaAs FET( CPY30 ) and Silicon RF Transistor( BFP540 ) produced by Infineon and experimented.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.5
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• pp.123-133
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• 1994

This paper presents an output arbitrator for input buffering ATM (Asynchronous Transfer Mode) switches using neural networks. To avoid blocking in ATM switches with blocking characteristics, it is required to buffer ATM cells in input buffer and to schedule them. The N$\times$N request matrix is divided into N/16 submatrices in order to get rid of internal blocking systematically in scheduling phase. The submatrices are grouped into N/4 groups, and the cells in each group are switched alternatively. As the window size of input buffer is increases, the number of input cells switched in a time slot approaches to N. The selection of nonblocking cells to be switched is done by neural network modules. N/4 neural network modules are operated simultaneously. Fast selection can be achieved by massive parallelism of neural networks. The neural networks have 4N neurons and 14N connection. The proposed method is implemented in C language, and the simulation result confirms the feasibility of this method.