• ETRI Journal
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• v.31 no.3
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• pp.298-303
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• 2009

A single-switch parallel resonant converter for induction heating is implemented. The circuit consists of an input LC-filter, a bridge rectifier, and a controlled power switch. The switch operates in soft commutation mode and serves as a high frequency generator. The output power is controlled via the switching frequency. A steady state analysis of the converter operation is presented. A closed-loop circuit model is also presented, and the experimental results are compared with the simulation results.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.150-151
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• 2010

본 논문에서는 5kW급 연료전지 응용을 위한 3상 DC-DC 컨버터를 제안한다. 제안한 컨버터의 Delta-Wye 결선은 전압형의 가장 큰 단점인 변압기 턴비를 최소화 하였으며 클램프 스위치의 동작으로 전압 및 전류 공진을 감소시키고 순환전류를 리셋시켜 각 소자들의 전류정격을 줄였다. 기존 3상 Full-Bridge와 비교 분석을 수행하였으며 시뮬레이션을 통해 타당성을 검증하였다.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.985-987
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• 1992

The three-phase full(6-pulse) bridge controlled rectifier is one of the most widely used types of solid-state converters in DC drive applications for higher performance. In most of the previous designs gate control circuits of the converter have been designed with analog method, whitch can be easily affected by noise. In this study microprocessor and pheripal LSIs are used for eliminating these problems and successful results have been obtained.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.603-608
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• 1998

Single-phase diode bridge rectifiers with dc filter capacitor usually operate in discontinuous mode and generate large amounts of harmonic currents. This paper presents a precise harmonic analysis of the line side current in the case that both the filter inductor and the filter capacitor are not infinite. The analytical expressions of the line side performance parameters associated with harmonics are derived. The curves that show the relationship of these parameters associated with harmonics are derived. The curves that show the relationship of these parameters as the functions of circuit parameters are illustrated. By simulation the results are verified to be accurate and the conclusion clearly reveals the relations between the line side performance parameters and circuit parameters.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.142-143
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• 2010

An active-clamped current-fed half-bridge converter for the high step-up application is proposed in this paper. The proposed converter is composed of active clamping snubber circuits and a voltage doubler rectifier. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, features, and validity of the proposed circuit, the experimental result for a 200W, 24V input and 400V output prototype are presented.

• Journal of Power Electronics
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• v.12 no.2
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.368-369
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• 2018

In this paper, a wireless charging system for drones is developed. The system is consists of PFC(Power Factor Correction), Full-Bridge inverter, S-S(Series-Series) resonant circuit and Full-Bridge rectifier. The parameters of the S-S resonant circuit is designed and calculated. According to these parameters and the switching devices, the system model without PFC is setted up with thermal module devices in PSIM. When output voltage is setted to 50[V] and input voltage is changed from 100[V] to 380[V], The efficiency of the system model is measured by simulation.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1270-1273
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• 2000

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter is proposed. The new converter improves the drawbacks of the previously proposed ZVZCS FB PWM converters [1-5]. A simple auxiliary circuit with neither lossy components nor active switches achieves ZVZCS of the primary switches. Since the proposed converter has many advantages such as simple auxiliary circuit, high efficiency, and low voltage stress of the rectifier diode, it is very attractive for the high power applications. The principles of operation and design considerations are presented. The experimental verifications from 2.5kW prototype converter operating at 70kHz are presented.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1632-1642
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• 2014

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• v.17 no.3
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• pp.664-673
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• 2017

With the development of multilevel converters, cascaded single-phase H-bridge rectifiers (CHBRs) has become widely adopted in high-voltage high-power applications. In this study, sequence pulse modulation (SPM) is proposed for CHBRs. SPM is designed to balance the dc-link voltage and maintain the smooth changes of switch states. In contrast to phase disposition modulation, SPM balances the dc-link voltage even after removing the load of one submodule. The operation principle of SPM is deduced, and the unbalance degree of SPM is analyzed. All the proposed approaches are experimentally verified through a prototype of a four-module (nine-level) CHBR. Conclusions are drawn in accordance with the results of SPM and its imbalance degree analysis.